Keyword: hardware
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MOPME046 Supervision Software for the Integration of the Beam Interlock System with the CERN Accelerator Complex software, operation, monitoring, linac 476
 
  • M. Audrain, D. Anderson, M. Dragu, K. Fuchsberger, J.C. Garnier, A.A. Gorzawski, M. Koza, K.H. Krol, A. Moscatelli, B. Puccio, K. Stamos, M. Zerlauth
    CERN, Geneva, Switzerland
 
  The Accelerator complex at the European Organisation for Nuclear Research (CERN) is composed of many systems which are required to function in a valid state to ensure safe beam operation. One key component of machine protection, the Beam Interlock System (BIS), was designed to interface critical systems around the accelerator chain, provide fast and reliable transmission of beam dump requests and trigger beam extraction in case of malfunctioning of equipment systems or beam losses. Numerous upgrades of accelerator and controls components during the Long Shutdown 1 (LS1) are followed by subsequent software updates that need to be thoroughly validated before the restart of beam operation in 2015. In parallel, the ongoing deployments of the BIS hardware in the PS booster (PSB) and the future LINAC4 give rise to new requirements for the related controls and monitoring software due to their fast cycle times. This paper describes the current status and ongoing work as well as the long-term vision for the integration of the Beam Interlock System software into the operational environment.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2014-MOPME046  
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MOPME055 Design and Construction of a Remote Control for the CADS Digital Power Supplies controls, FPGA, power-supply, EPICS 498
 
  • Y.Y. Du, J.S. Cao, Q. Ye
    IHEP, Beijing, People's Republic of China
 
  A remote controlled power supply system includes a data processing system and control at least 76 power supplies, which is designed for the China Accelerator Driven Subcritical system (C-ADS) power supplies system. The system Construction in the mode of integrated control with 1U chassis board, and the hardware parts control core based on Field Programmable Gate Array (FPGA). The software part adopts Experimental Physics and Industrial Control System (EPICS) platform with database and TCP/IP protocol, the administrators can acquire the working parameter through a remote control equipment and control the power supply at the remote site.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2014-MOPME055  
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TUPRI107 Compact MTCA.4 Based Laser Synchronization laser, timing, FPGA, FEL 1823
 
  • M. Felber, L. Butkowski, H.T. Duhme, M. Fenner, C. Gerth, U. Mavrič, P. Peier, H. Schlarb, B. Steffen
    DESY, Hamburg, Germany
  • T. Kozak, P. Prędki, K.P. Przygoda
    TUL-DMCS, Łódź, Poland
 
  In this paper we present a compact and efficient approach for laser synchronization based on MTCA.4 platform. Laser pulses are converted to the RF signals using a photo-diode detector. The RF section performs filtering, amplification and down-conversion of a narrowband, CW signal. The resulting IF signal is sampled by a high resolution digitizer on the AMC (Advanced Mezzanine Card) side and transported via point-to-point links to an adjacent AMC board. The processing electronics on this board drives a digital-to-analog converter on the rear-side. The analog signal is then filtered and amplified by a high voltage power amplifier which drives the piezo stretcher in the laser. Some preliminary results of laser to RF locking with such a scheme are presented.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2014-TUPRI107  
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WEPRO076 Constructing the ESS Linear Accelerator: Pragmatic Approaches to Design and System Integration at the European Spallation Source software, interface, linac, proton 2131
 
  • G. Lanfranco, M.J. Conlon, N. Gazis, E. Tanke, E. Vaena
    ESS, Lund, Sweden
 
  The European Spallation Source (ESS) is a neutron science facility comprising a linear H+ accelerator, a tungsten target station, 22 neutron instruments, a suite of laboratories and a supercomputing data processing centre. The Accelerator project represents about a third of the total ESS construction budget and several European countries participate as in-kind contributing partners to it. It is crucial to guarantee requirements consistency, clarity of interface definition and proper space allocation. Potential functional and design inconsistencies must be promptly detected and actively resolved, bridging the project from the conceptual design towards a smooth, cost and time effective installation. Moreover, while the correct synergies are established and maintained, the organisational burden has to be minimized, aspect particularly relevant given the intrinsic prototypic nature of projects of this type. This paper describes the system architecture and the tools deployed to integrate the design of the ESS Linear Accelerator and to prepare for its installation.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2014-WEPRO076  
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WEPME074 Development of Digital Low Level Radio Frequency Controller at SSRF LLRF, storage-ring, interface, controls 2453
 
  • Y.B. Zhao, J.F. Liu, K. Xu, Zh.G. Zhang, S.J. Zhao, X. Zheng
    SINAP, Shanghai, People's Republic of China
 
  Digital low level radio frequency technology has been adopted in the storage ring of SSRF and a controller based on commercial FPGA and DSP board has been developed and operated successfully which helps SSRF to satisfy its specification with beam high to 300mA. The second generation controller has been fabricated in house and used with 240mA beam current at beginning of this year. The stability of amplitude and phase reaches 0.089% (RMS) and 0.093 degree (RMS) respectively. The recent progress on digital LLRF for FEL will be also reported such as the development activities and test results on the local oscillation generation board and down converter board.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2014-WEPME074  
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THPRO089 New Tune Jumps Scheme in the Low Energy Part of the AGS Cycle polarization, resonance, simulation, acceleration 3092
 
  • Y. Dutheil, L. Ahrens, J.W. Glenn, H. Huang, F. Méot, V. Schoefer
    BNL, Upton, Long Island, New York, USA
 
  Funding: Work supported by Brookhaven Science Associates, LLC under Contract No. DE-AC02-98CH10886 with the U.S. Department of Energy.
During the early part of the acceleration of polarized protons, due to strong optical deformations of the lattice, the tune cannot be placed in the spin gap and the first two vertical intrinsic resonances are crossed. Recent multiparticle trackings using the Zgoubi code show that the spin resonances around Gg=5 could cause as much as 5% loss of polarization. The slow acceleration rate, the two vertical and two horizontal intrinsic spin resonances can contribute to the depolarization in the region. While in the current scheme only the two horizontal intrinsic resonances are jumped, it was proposed to use the tune jumps system to also accelerate the crossing of the two weak vertical intrinsic resonances and improve the polarization transmission through this region. We show the design of this new tune jumps scheme and the expected polarization gains expected from multiparticles Zgoubi simulations. We also compare experimental measurements of the polarization transmission to the Zgoubi simulations.
 
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2014-THPRO089  
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THPRO102 Generation of RF Frequency and Phase References on the FAIR Site controls, electronics, cavity, acceleration 3131
 
  • B. Zipfel, H. Klingbeil, U. Laier, K.-P. Ningel, S. Schäfer, C. Thielmann
    GSI, Darmstadt, Germany
  • U. Hartel, H. Klingbeil
    TEMF, TU Darmstadt, Darmstadt, Germany
  • D.E.M. Lens
    TU Darmstadt, RTR, Darmstadt, Germany
 
  Based on the Bunch Phase Timing System (BuTiS)* local analog radio frequency reference signals (RF references) like the particle revolution frequency and their multiple harmonics will be generated. These references are used to control the phase of the accelerator cavities to altering harmonics of the bunch revolution frequency. Delay or phase shifts from the FAIR-Center to references at the BuTiS endpoints are already compensated by the BuTiS receivers. Phase shifts from the RF reference generators to LLRF electronics can be compensated by controlling the output phases of the DDS modules of the RF references. However phase shift delays of multiple harmonics at the same interconnecting electrical path are not identical at the same time. Configurable electronics** manage phase calibration of the RF references to their endpoints. Calibration may depend on frequency and harmonic of the RF reference, aging as well as on thermal effects. The electrical length and impedance of interconnecting cables for phase control loops can be compensated. This is an important feature, in particular if control loops are switched between different harmonic frequencies.
*B. Zipfel, P. Moritz: Proc. IPAC 2011, San Sebastian
**S. Schäfer, et al.: Proc. IPAC 2013, Shanghai
 
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2014-THPRO102  
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THPRO104 Drivers and Software for MTCA.4 controls, interface, LLRF, Linux 3137
 
  • M. Killenberg, L.M. Petrosyan, Ch. Schmidt
    DESY, Hamburg, Germany
  • S. Marsching
    Aquenos GmbH, Baden-Baden, Germany
  • A. Piotrowski
    FastLogic Sp. z o.o., Łódź, Poland
 
  Funding: This work is supported by the Helmholtz Validation Fund HVF-0016 "MTCA.4 for Industry".
The MicroTCA.4 crate standard is a powerful electronic platform for digital and analog signal processing. Besides its hardware modularity, it is the software reliability and flexibility as well as the easy integration into existing software infrastructures that will drive the widespread adoption of this new standard. The DESY MicroTCA.4 User tool kit (MTCA4U) provides drivers, and a C++ API for accessing the MicroTCA.4 devices and interfacing to the control system. The PCIexpress driver is universal for basic access to all devices developed at DESY. Modularity and expandability allow to generate device-specific drivers with a minimum of code, inheriting the functionality of the base driver. A C++ API allows convenient access to all device registers by name, using mapping information which is automatically generated when building the firmware. A graphical user interface allows direct read and write access to the device, including plotting functionality for recorded raw data. Higher level applications will provide callback functions for easy integration into control systems, while keeping the application code independent from the actual control system in use.
 
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2014-THPRO104  
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THPRO123 Control System of EPU48 in TPS controls, EPICS, interface, status 3180
 
  • C.Y. Wu, J. Chen, Y.-S. Cheng, K.T. Hsu, D. Lee, C.Y. Liao
    NSRRC, Hsinchu, Taiwan
 
  Insertion device (ID) is a crucial component in third-generation synchrotron light sources, which can produces highly-brilliant, forward-directed and quasi-monochromatic radiation over a broad energy range for various experiments. In the phase I of the Taiwan Photon Source (TPS) project, two EPU48s (Elliptically Polarized Undulator) will be installed. The control system for EPU48 is based on the EPICS architecture. All control functionality coordinate by the cPCI EPICS IOC. The main control components include the motor with encoder for gap adjustment and phase moving, trimming power supply for corrector magnets, temperature sensors for ID environmental monitoring , interlock system (limit switches, tilt sensor, emergency button) for safety and supporting of on-the-fly experiments for beamline. Features and benefits of EPU48 control system will be summarized in this report.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2014-THPRO123  
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THPME053 Cost Rationales for an SRF Proton Linac cavity, linac, proton, SRF 3349
 
  • F. Marhauser
    Muons, Inc, Illinois, USA
 
  Rationales to assess and minimize costs for a Superconducting Radio Frequency (SRF) proton linac are outlined. Operating frequency, velocity profile and temperature are regarded as variables when applicable. Hardware plus labor costs for cavities and cryomodules as well as expenditures for facility infrastructures including cryogenic systems, conventional facilities, and relevant subsystems are estimated. The focus is on the assessment of a 10 MW, 1 GeV Continuous Wave (CW) linac for an Accelerator Driven Subcritical Reactor (ADSR)  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2014-THPME053  
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THPRI020 Availability Studies for Linac4 and Machine Protection Requirements for Linac4 Commissioning linac, operation, target, ion 3807
 
  • A. Apollonio, S. Gabourin, C. Martin, B. Mikulec, B. Puccio, J.L. Sanchez Alvarez, D. Wollmann, M. Zerlauth
    CERN, Geneva, Switzerland
 
  Linac4 is one of the key elements in the upgrade program of the LHC injector complex at CERN, assuring beams with higher bunch intensities and smaller emittance for the LHC and many other physics experiments on the CERN site. Due to the demand of continuous operation, the expected availability of Linac4 needs to be carefully studied already during its design phase. In this paper an overview of the relevant systems impacting on Linac4 machine availability is given: the various system failure modes are outlined as well as their impact on the total yearly machine downtime. Machine Protection Systems (MPS) play a significant role in reducing the risk associated to each failure mode and are therefore important for reaching the target availability. The Linac4 MPS requirements, with particular focus on the different commissioning phases, are discussed.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2014-THPRI020  
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THPRI095 Testing Quality and Metrics for the LHC Magnet Powering System throughout Past and Future Commissioning framework, operation, interface, embedded 3995
 
  • D. Anderson, M. Audrain, Z. Charifoulline, M. Dragu, K. Fuchsberger, J.C. Garnier, A.A. Gorzawski, M. Koza, K.H. Krol, S. Rowan, K. Stamos, M. Zerlauth
    CERN, Geneva, Switzerland
 
  The LHC magnet powering system is comprised of thousands of individual components to assure a safe operation when operating with stored energies as high as 10GJ in the superconducting LHC magnets. Each of these components has to be thoroughly commissioned following interventions and machine shutdown periods to assure their protection function in case of powering failures. As well as a dependable tracking of test executions it is vital that the executed commissioning steps and applied analysis criteria adequately represent the operational state of each component. The Accelerator Testing (AccTesting) framework in combination with a domain specific analysis language provides the means to quantify and improve the quality of analysis for future campaigns. Dedicated tools were developed to analyse in detail the reasons for failures and success of commissioning steps in past campaigns and to compare the results with newly developed quality metrics. Observed shortcomings and discrepancies are used to propose additional verification and mitigation for future campaigns in an effort to improve the testing quality and hence assure the overall dependability of subsequent operational periods.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2014-THPRI095  
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