Keyword: FPGA
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MOPME055 Design and Construction of a Remote Control for the CADS Digital Power Supplies controls, power-supply, EPICS, hardware 498
 
  • Y.Y. Du, J.S. Cao, Q. Ye
    IHEP, Beijing, People's Republic of China
 
  A remote controlled power supply system includes a data processing system and control at least 76 power supplies, which is designed for the China Accelerator Driven Subcritical system (C-ADS) power supplies system. The system Construction in the mode of integrated control with 1U chassis board, and the hardware parts control core based on Field Programmable Gate Array (FPGA). The software part adopts Experimental Physics and Industrial Control System (EPICS) platform with database and TCP/IP protocol, the administrators can acquire the working parameter through a remote control equipment and control the power supply at the remote site.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2014-MOPME055  
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MOPME058 The Magnet Power Supply for PAL-XFEL controls, power-supply, embedded, feedback 504
 
  • K.-H. Park, Y.-G. Jung, D.E. Kim, I.S. Ko, H.-G. Lee, S.B. Lee, H.S. Suh
    PAL, Pohang, Kyungbuk, Republic of Korea
  • W.S. Choi, M.J. Kim
    POSTECH, Pohang, Kyungbuk, Republic of Korea
 
  A magnet power supply (MPS) for PAL-XFEL was developed, which is the bipolar type with the power capacity of 3.6KW. The MPS has been implemented by the digital signal processing technology using the DSP, FPGA, ADCs and so on. An embedded module was adapted for the Ethernet connection for EPCIS. The output current stability of the MPS showed about 10 ppm peak-to-peak in long term experiment. The measured accuracy was less than 10ppm in full range. The other experimental results such as repeatability and zero-cross response were given in this paper.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2014-MOPME058  
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TUPRI107 Compact MTCA.4 Based Laser Synchronization laser, timing, hardware, FEL 1823
 
  • M. Felber, L. Butkowski, H.T. Duhme, M. Fenner, C. Gerth, U. Mavrič, P. Peier, H. Schlarb, B. Steffen
    DESY, Hamburg, Germany
  • T. Kozak, P. Prędki, K.P. Przygoda
    TUL-DMCS, Łódź, Poland
 
  In this paper we present a compact and efficient approach for laser synchronization based on MTCA.4 platform. Laser pulses are converted to the RF signals using a photo-diode detector. The RF section performs filtering, amplification and down-conversion of a narrowband, CW signal. The resulting IF signal is sampled by a high resolution digitizer on the AMC (Advanced Mezzanine Card) side and transported via point-to-point links to an adjacent AMC board. The processing electronics on this board drives a digital-to-analog converter on the rear-side. The analog signal is then filtered and amplified by a high voltage power amplifier which drives the piezo stretcher in the laser. Some preliminary results of laser to RF locking with such a scheme are presented.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2014-TUPRI107  
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WEPME068 Mitigating Noise Sources in MTCA.4 Electronics for High Precision Measurements coupling, instrumentation, distributed, simulation 2436
 
  • U. Mavrič, M. Hoffmann, F. Ludwig, H. Schlarb
    DESY, Hamburg, Germany
 
  The RF field detection instrumentation plays a crucial role in modern accelerator performance. The most critical section is the transition from the analog signal processing to the digitalization. In this paper we present state of the art performance of COTS components and limitations imposed by crate-oriented solutions. We give recipes on how to optimize performance and present some of the recent results.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2014-WEPME068  
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WEPME071 Development and Construction Status of New LLRF Control System for SuperKEKB controls, cavity, LLRF, klystron 2444
 
  • T. Kobayashi, K. Akai, K. Ebihara, A. Kabe, K. Nakanishi, M. Nishiwaki, J.-I. Odagiri
    KEK, Ibaraki, Japan
  • H. Deguchi, K. Hayashi, T. Iwaki, M. Ryoshi
    Mitsubishi Electric TOKKI Systems, Amagasaki, Hyogo, Japan
 
  Beam commissioning of the SuperKEKB will be started in 2015. A new LLRF control system, which is an FPGA-based digital RF feedback control system on the MicroTCA platform, has been developed to satisfy the requirement for high current beam operation of the SuperKEKB. Then final refinements were applied, and now the quantity production is in progress. As a new function, klystron phase lock loop was additionally implemented within the cavity feedback control loop in the FPGA, and it was successfully worked in the low-level operation test. For the SuperKEKB, damping ring (DR) is required for the positron injection. Therefore another new LLRF control system is under development for the DR-RF system. It is operated at the same RF-frequency as the main ring, and vector sum control of three cavities is needed in the DR-LLRF control. In this report, the development status and progress from the previous report will be presented including the RF reference distribution system.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2014-WEPME071  
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WEPME075 Real-time Estimation of Superconducting Cavities Parameters cavity, controls, operation, LLRF 2456
 
  • R. Rybaniec
    Warsaw University of Technology, Institute of Electronic Systems, Warsaw, Poland
  • V. Ayvazyan, J. Branlard, L. Butkowski, S. Pfeiffer, H. Schlarb, Ch. Schmidt
    DESY, Hamburg, Germany
  • W. Cichalewski, K.P. Przygoda
    TUL-DMCS, Łódź, Poland
 
  Performance of accelerators based on the superconductive cavities including FLASH and XFEL facilities at DESY is affected by cavity parameters variation over time. High gradient electromagnetic field inside cavities causes detuning due to the Lorentz force. In addition the quality factor of cavities can change during the RF field pulse. Currently used method for estimation of those parameters is based on the post-processing of the data recorded during operation of the RF. External servers calculate cavity parameters using cavity equation, forward power and probe signals collected during previous pulse. A novel approach* based on the component implemented in FPGA is presented. In the new method loaded quality factor and detuning are estimated in real-time during the RF pulse for increased reliability and better exception handling. Modified firmware of the LLRF control system based on the Micro Telecommunications Computing Architecture (MTCA) platform has been used for the method verification.
*”Development of Control System for Fast Frequency Tuners of Superconducting Resonant Cavities for FLASH and XFEL Experiments”, K. Przygoda, PhD thesis, Technical University of Łódź, Poland, 2010.
 
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2014-WEPME075  
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THOAA02 Development of a Low-latency, High-precision, Intra-train Beam Feedback System Based on Cavity Beam Position Monitors feedback, cavity, kicker, controls 2783
 
  • N. Blaskovic Kraljevic, D.R. Bett, P. Burrows, G.B. Christian, M.R. Davis, Y.I. Kim, C. Perry
    JAI, Oxford, United Kingdom
 
  A low-latency, intra-train, beam feedback system utilising a cavity beam position monitor (BPM) has been developed and tested at the final focus of the Accelerator Test Facility (ATF2) at KEK. A low-Q cavity BPM was utilised with custom signal processing electronics, designed for low latency and optimal position resolution, to provide an input beam position signal to the feedback system. A custom stripline kicker and power amplifier, and an FPGA-based digital feedback board, were used to provide beam correction and feedback control, respectively. The system was deployed in single-pass, multi-bunch mode with the aim of demonstrating intra-train beam stabilisation on electron bunches of charge ~ 1nC separated in time by c. 280ns. The system has been used to demonstrate beam stabilisation to below the 100nm level. Results of the latest beam tests, aimed at even higher performance, will be presented.  
slides icon Slides THOAA02 [2.050 MB]  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2014-THOAA02  
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THYB01 Status and Trends in Magnet Power Converter Technology for Accelerators controls, power-supply, synchrotron, booster 2822
 
  • F. Long
    IHEP, Beijing, People's Republic of China
 
  Power converters (PC) is one of the key technologies for accelerators. During recent years with the development of power semiconductor devices, optimization of topologies, and improvement of manufacturing, the voltage and current ratings and power densities have greatly increased for PCs. Various PCs are required for various magnets in accelerators, but in principle the design for main topologies and the methodology for stabilizing the output are similar. Main topologies, digital control systems,and considerations for the future about the magnet PC are briefly discussed in this presentation.  
slides icon Slides THYB01 [2.477 MB]  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2014-THYB01  
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THPME160 Design, Implementation and Preliminary Test Results of the ESS Beam Current Monitor System interface, electronics, timing, linac 3638
 
  • H. Hassanzadegan, A. Jansson, C.A. Thomas
    ESS, Lund, Sweden
  • J.L. Crisp
    FRIB, East Lansing, Michigan, USA
  • U. Legat, K. Strniša
    Cosylab, Ljubljana, Slovenia
  • M. Werner
    DESY, Hamburg, Germany
 
  The Beam Current Monitor system of the ESS linac will be mainly based on AC Current Transformers. The BCM system will be used to monitor the beam current and charge in absolute and differential modes. The differential current measurement is also intended for detecting large and sudden beam losses and acting on the Machine Interlock System (MIS), especially in areas where Beam Loss Monitors cannot be reliably used. A demo BCM based on a Bergoz ACCT and MTCA.4 electronics has been procured and integrated into EPICS. A VHDL code has been developed and successfully tested for the required FPGA signal processing including droop compensation, filtering, DC level correction and interfacing to the MIS. This paper gives an overview of the current status of the BCM system design and implementation as well as some preliminary test results in absolute and differential modes.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2014-THPME160  
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THPME186 Development of a BPM System using a Commercial FPGA Card and Digitizer Adaptor Module for FETS LabView, pick-up, alignment, electronics 3716
 
  • G.E. Boorman, S.M. Gibson
    Royal Holloway, University of London, Surrey, United Kingdom
  • R.T.P. D'Arcy, S. Jolly
    UCL, London, United Kingdom
  • S.R. Lawrie, A.P. Letchford
    STFC/RAL/ISIS, Chilton, Didcot, Oxon, United Kingdom
 
  A series of beam position monitors (BPMs) will be installed at the Front End Test Stand (FETS) at RAL as part of the 3 MeV Medium Energy Beam Transport (MEBT). The BPMs analyse 2 ms long, 60 mA beam pulses delivered to the MEBT by a 324 MHz Radio Frequency Quadrupole (RFQ). Initial linearity and resolution measurements from the prototype button BPMs are shown. The development of the algorithm for the processing of the BPM signals using a commercial PXI-based FPGA card is discussed and initial measurements of the electronics and signal processing are presented. The test-rig used to characterise each BPM and further develop the processing algorithm is described. The position and phase are measured several times throughout the duration of each pulse, and the measurements are made available via an EPICS server.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2014-THPME186  
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