ICALEPCS2011 - Table of Session: WEMMU (Mini Orals D)

Paper

Title

Page

Floating-point-based Hardware Accelerator of a Beam Phase-Magnitude Detector and Filter for a Beam Phase Control System in a Heavy-Ion Synchrotron Application

683

F.A. Samman
Technische Universität Darmstadt, Darmstadt, Germany
M. Glesner, C. Spies, S. Surapong
TUD, Darmstadt, Germany

Funding: German Federal Ministry of Education and Research in the frame of Project FAIR (Facility for Antiproton and Ion Research), Grant Number 06DA9028I.
A hardware implementation of an adaptive phase and magnitude detector and filter of a beam-phase control system in a heavy ion synchrotron application is presented in this paper [1]. The main components of the hardware are adaptive LMS filters and a phase and magnitude detector. The phase detectors are implemented by using a CORDIC algorithm based on 32-bit binary floating-point arithmetic data formats. Therefore, a decimal to floating-point adapter is required to interface the data from an ADC to the phase and magnitude detector. The floating-point-based hardware is designed to improve the precision of the past hardware implementation that is based on fixed-point arithmetics. The hardware of the detector and the adaptive LMS filter have been implemented on a reconfigurable FPGA device for hardware acceleration purpose. The ideal Matlab/Simulink model of the hardware and the VHDL model of the adaptive LMS filter and the phase and magnitude detector are compared. The comparison result shows that the output signal of the floating-point based adaptive FIR filter as well as the phase and magnitude detector is simillar to the expected output signal of the ideal Matlab/Simulink model.
[1] H. Klingbeil, "A Fast DSP-Based Phase-Detector for Closed-Loop RF Control in Synchrotrons," IEEE Trans. Instrum. Meas., 54(3):1209–1213, 2005.

Slides WEMMU001 [0.383 MB]

WEMMU004

SPI Boards Package, a New Set of Electronic Boards at Synchrotron SOLEIL

687

Y.-M. Abiven, P. Betinelli-Deck, J. Bisou, F. Blache, F. Briquez, A. Chattou, J. Coquet, P. Gourhant, N. Leclercq, P. Monteiro, G. Renaud, J.P. Ricaud, L. Roussier
SOLEIL, Gif-sur-Yvette, France

SOLEIL is a third generation Synchrotron radiation source located in France near Paris. At the moment, the Storage Ring delivers photon beam to 23 beamlines. Since machine and beamlines improve their performance, new requirements are identified. On the machine side, new implementation for feedforward of electromagnetic undulators is required to improve beam stability. On the beamlines side, a solution is required to synchronize data acquisition with motor position during continuous scan. In order to provide a simple and modular solution for these applications requiring synchronization, the electronic group developed a set of electronic boards called "SPI board package". In this package, the boards can be connected together in daisy chain and communicate to the controller through a SPI* Bus. Communication with control system is done via Ethernet. At the moment the following boards are developed: a controller board based on a Cortex M3 MCU, 16bits ADC board, 16bits DAC board and a board allowing to process motor encoder signals based on a FPGA Spartan III. This platform allows us to embed process close to the hardware with open tools. Thanks to this solution we reach the best performances of synchronization.
* SPI: Serial Peripheral Interface

Slides WEMMU004 [0.230 MB]

Poster WEMMU004 [0.430 MB]

WEMMU005

Fabric Management with Diskless Servers and Quattor on LHCb

691

P. Schweitzer, E. Bonaccorsi, L. Brarda, N. Neufeld
CERN, Geneva, Switzerland

Large scientific experiments nowadays very often are using large computer farms to process the events acquired from the detectors. In LHCb a small sysadmin team manages 1400 servers of the LHCb Event Filter Farm, but also a wide variety of control servers for the detector electronics and infrastructure computers : file servers, gateways, DNS, DHCP and others. This variety of servers could not be handled without a solid fabric management system. We choose the Quattor toolkit for this task. We will present our use of this toolkit, with an emphasis on how we handle our diskless nodes (Event filter farm nodes and computers embedded in the acquisition electronic cards). We will show our current tests to replace the standard (RedHat/Scientific Linux) way of handling diskless nodes to fusion filesystems and how it improves fabric management.

Slides WEMMU005 [0.119 MB]

Poster WEMMU005 [0.602 MB]

WEMMU006

Management Tools for Distributed Control System in KSTAR

694

S. Lee, J.S. Hong, J.S. Park, M.K. Park, S.W. Yun
NFRI, Daejon, Republic of Korea

The integrated control system of the Korea Superconducting Tokamak Advanced Research (KSTAR) has been developed with distributed control systems based on Experimental Physics and Industrial Control System (EPICS). It has the essential role of remote operation, supervising of tokamak device and conducting of plasma experiments without any interruption. Therefore, the availability of the control system directly impacts on the entire device performance. For the non-interrupted operation of the KSTAR control system, we have developed a tool named as Control System Monitoring (CSM) to monitor the resources of EPICS Input/Output Controller (IOC) servers (utilization of memory, cpu, disk, network, user-defined process and system-defined process), the soundness of storage systems (storage utilization, storage status), the status of network switches using Simple Network Management Protocol (SNMP), the network connection status of every local control sever using Internet Control Message Protocol (ICMP), and the operation environment of the main control room and the computer room (temperature, humidity, water-leak) in real time. When abnormal conditions or faults are detected by the CSM, it alerts abnormal or fault alarms to operators. Especially, if critical fault related to the data storage occurs, the CSM sends the simple messages to operator’s mobile phone. In addition to the CSM, other tools, which are subversion for software version control and vmware for the virtualized IT infrastructure, for managing the integrated control system for KSTAR operation will be introduced.

Slides WEMMU006 [0.247 MB]

Poster WEMMU006 [5.611 MB]

WEMMU007

Reliability in a White Rabbit Network

698

M. Lipiński, J. Serrano, T. Włostowski
CERN, Geneva, Switzerland
C. Prados
GSI, Darmstadt, Germany

White Rabbit (WR) is a time-deterministic, low-latency Ethernet-based network which enables transparent, sub-ns accuracy timing distribution. It is being developed to replace the General Machine Timing (GMT) system currently used at CERN and will become the foundation for the control system of the Facility for Antiproton and Ion Research (FAIR) at GSI. High reliability is an important issue in WR's design, since unavailability of the accelerator's control system will directly translate into expensive downtime of the machine. A typical WR network is required to lose not more than a single message per year. Due to WR's complexity, the translation of this real-world-requirement into a reliability-requirement constitutes an interesting issue on its own: a WR network is considered functional only if it provides all its services to all its clients at any time. This paper defines reliability in WR and describes how it was addressed by dividing it into sub-domains: deterministic packet delivery, data redundancy, topology redundancy and clock resilience. The studies show that the Mean Time Between Failure (MTBF) of the WR Network is the main factor affecting its reliability. Therefore, probability calculations for different topologies were performed using the "Fault Tree analysis" and analytic estimations. Results of the study show that the requirements of WR are demanding. Design changes might be needed and further in-depth studies required, e.g. Monte Carlo simulations. Therefore, a direction for further investigations is proposed.

Slides WEMMU007 [0.689 MB]

Poster WEMMU007 [1.080 MB]

WEMMU009

Status of the RBAC Infrastructure and Lessons Learnt from its Deployment in LHC

702

W. Sliwinski, P. Charrue, I. Yastrebov
CERN, Geneva, Switzerland

The distributed control system for the LHC accelerator poses many challenges due to its inherent heterogeneity and highly dynamic nature. One of the important aspects is to protect the machine against unauthorised access and unsafe operation of the control system, from the low-level front-end machines up to the high-level control applications running in the control room. In order to prevent an unauthorized access to the control system and accelerator equipment and to address the possible security issues, the Role Based Access Control (RBAC) project was designed and developed at CERN, with a major contribution from Fermilab laboratory. Furthermore, RBAC became an integral part of the CERN Controls Middleware (CMW) infrastructure and it was deployed and commissioned in the LHC operation in the summer 2008, well before the first beam in LHC. This paper presents the current status of the RBAC infrastructure, together with an outcome and gathered experience after a massive deployment in the LHC operation. Moreover, we outline how the project evolved over the last three years and give an overview of the major extensions introduced to improve integration, stability and its functionality. The paper also describes the plans of future project evolution and possible extensions, based on gathered users requirements and operational experience.

Slides WEMMU009 [0.604 MB]

Poster WEMMU009 [1.262 MB]

WEMMU010

Dependable Design Flow for Protection Systems using Programmable Logic Devices

706

M. Kwiatkowski, B. Todd
CERN, Geneva, Switzerland

Programmable Logic Devices (PLD) such as Field Programmable Gate Arrays (FPGA) are becoming more prevalent in protection and safety-related electronic systems. When employing such programmable logic devices, extra care and attention needs to be taken. It is important to be confident that the final synthesis result, used to generate the bit-stream to program the device, meets the design requirements. This paper will describe how to maximize confidence using techniques such as Formal Methods, exhaustive Hardware Description Language (HDL) code simulation and hardware testing. An example will be given for one of the critical function of the Safe Machine Parameters (SMP) system, one of the key systems for the protection of the Large Hadrons Collider (LHC) at CERN. The design flow will be presented where the implementation phase is just one small element of the whole process. Techniques and tools presented can be applied for any PLD based system implementation and verification.

Slides WEMMU010 [1.093 MB]

Poster WEMMU010 [0.829 MB]

WEMMU011

Radiation Safety Interlock System for SACLA (XFEL/SPring-8)

710

M. Kago, T. Matsushita, N. Nariyama, C. Saji, R. Tanaka, A. Yamashita
JASRI/SPring-8, Hyogo-ken, Japan
Y. Asano, T. Hara, T. Itoga, Y. Otake, H. Takebe
RIKEN/SPring-8, Hyogo, Japan
H. Tanaka
RIKEN SPring-8 Center, Sayo-cho, Sayo-gun, Hyogo, Japan

The radiation safety interlock system for SACLA (XFEL/SPring-8) protects personnel from radiation hazards. The system controls access to the accelerator tunnel, monitors the status of safety equipment such as emergency stop buttons, and gives permission for accelerator operation. The special feature of the system is a fast beam termination when the system detects an unsafe state. A total beam termination time is required less than 16.6 ms (linac operation repetition cycle: 60 Hz). Especially important is the fast beam termination when the electron beams deviates from the proper transport route. Therefore, we developed optical modules in order to transmit a signal at a high speed for a long distance (an overall length of around 700 m). An exclusive system was installed for fast judgment of a proper beam route. It is independent from the main interlock system which manages access control and so on. The system achieved a response time of less than 7ms, which is sufficient for our demand. The construction of the system was completed in February 2011 and the system commenced operation in March 2011. We will report on the design of the system and its detailed performance.

Slides WEMMU011 [0.555 MB]

Poster WEMMU011 [0.571 MB]

Paper	Title	Page
WEMMU001	Floating-point-based Hardware Accelerator of a Beam Phase-Magnitude Detector and Filter for a Beam Phase Control System in a Heavy-Ion Synchrotron Application	683
	F.A. Samman Technische Universität Darmstadt, Darmstadt, Germany M. Glesner, C. Spies, S. Surapong TUD, Darmstadt, Germany
	Funding: German Federal Ministry of Education and Research in the frame of Project FAIR (Facility for Antiproton and Ion Research), Grant Number 06DA9028I. A hardware implementation of an adaptive phase and magnitude detector and filter of a beam-phase control system in a heavy ion synchrotron application is presented in this paper [1]. The main components of the hardware are adaptive LMS filters and a phase and magnitude detector. The phase detectors are implemented by using a CORDIC algorithm based on 32-bit binary floating-point arithmetic data formats. Therefore, a decimal to floating-point adapter is required to interface the data from an ADC to the phase and magnitude detector. The floating-point-based hardware is designed to improve the precision of the past hardware implementation that is based on fixed-point arithmetics. The hardware of the detector and the adaptive LMS filter have been implemented on a reconfigurable FPGA device for hardware acceleration purpose. The ideal Matlab/Simulink model of the hardware and the VHDL model of the adaptive LMS filter and the phase and magnitude detector are compared. The comparison result shows that the output signal of the floating-point based adaptive FIR filter as well as the phase and magnitude detector is simillar to the expected output signal of the ideal Matlab/Simulink model. [1] H. Klingbeil, "A Fast DSP-Based Phase-Detector for Closed-Loop RF Control in Synchrotrons," IEEE Trans. Instrum. Meas., 54(3):1209–1213, 2005.
	Slides WEMMU001 [0.383 MB]

WEMMU004	SPI Boards Package, a New Set of Electronic Boards at Synchrotron SOLEIL	687
	Y.-M. Abiven, P. Betinelli-Deck, J. Bisou, F. Blache, F. Briquez, A. Chattou, J. Coquet, P. Gourhant, N. Leclercq, P. Monteiro, G. Renaud, J.P. Ricaud, L. Roussier SOLEIL, Gif-sur-Yvette, France
	SOLEIL is a third generation Synchrotron radiation source located in France near Paris. At the moment, the Storage Ring delivers photon beam to 23 beamlines. Since machine and beamlines improve their performance, new requirements are identified. On the machine side, new implementation for feedforward of electromagnetic undulators is required to improve beam stability. On the beamlines side, a solution is required to synchronize data acquisition with motor position during continuous scan. In order to provide a simple and modular solution for these applications requiring synchronization, the electronic group developed a set of electronic boards called "SPI board package". In this package, the boards can be connected together in daisy chain and communicate to the controller through a SPI* Bus. Communication with control system is done via Ethernet. At the moment the following boards are developed: a controller board based on a Cortex M3 MCU, 16bits ADC board, 16bits DAC board and a board allowing to process motor encoder signals based on a FPGA Spartan III. This platform allows us to embed process close to the hardware with open tools. Thanks to this solution we reach the best performances of synchronization. * SPI: Serial Peripheral Interface
	Slides WEMMU004 [0.230 MB]
	Poster WEMMU004 [0.430 MB]

WEMMU005	Fabric Management with Diskless Servers and Quattor on LHCb	691
	P. Schweitzer, E. Bonaccorsi, L. Brarda, N. Neufeld CERN, Geneva, Switzerland
	Large scientific experiments nowadays very often are using large computer farms to process the events acquired from the detectors. In LHCb a small sysadmin team manages 1400 servers of the LHCb Event Filter Farm, but also a wide variety of control servers for the detector electronics and infrastructure computers : file servers, gateways, DNS, DHCP and others. This variety of servers could not be handled without a solid fabric management system. We choose the Quattor toolkit for this task. We will present our use of this toolkit, with an emphasis on how we handle our diskless nodes (Event filter farm nodes and computers embedded in the acquisition electronic cards). We will show our current tests to replace the standard (RedHat/Scientific Linux) way of handling diskless nodes to fusion filesystems and how it improves fabric management.
	Slides WEMMU005 [0.119 MB]
	Poster WEMMU005 [0.602 MB]

WEMMU006	Management Tools for Distributed Control System in KSTAR	694
	S. Lee, J.S. Hong, J.S. Park, M.K. Park, S.W. Yun NFRI, Daejon, Republic of Korea
	The integrated control system of the Korea Superconducting Tokamak Advanced Research (KSTAR) has been developed with distributed control systems based on Experimental Physics and Industrial Control System (EPICS). It has the essential role of remote operation, supervising of tokamak device and conducting of plasma experiments without any interruption. Therefore, the availability of the control system directly impacts on the entire device performance. For the non-interrupted operation of the KSTAR control system, we have developed a tool named as Control System Monitoring (CSM) to monitor the resources of EPICS Input/Output Controller (IOC) servers (utilization of memory, cpu, disk, network, user-defined process and system-defined process), the soundness of storage systems (storage utilization, storage status), the status of network switches using Simple Network Management Protocol (SNMP), the network connection status of every local control sever using Internet Control Message Protocol (ICMP), and the operation environment of the main control room and the computer room (temperature, humidity, water-leak) in real time. When abnormal conditions or faults are detected by the CSM, it alerts abnormal or fault alarms to operators. Especially, if critical fault related to the data storage occurs, the CSM sends the simple messages to operator’s mobile phone. In addition to the CSM, other tools, which are subversion for software version control and vmware for the virtualized IT infrastructure, for managing the integrated control system for KSTAR operation will be introduced.
	Slides WEMMU006 [0.247 MB]
	Poster WEMMU006 [5.611 MB]

WEMMU007	Reliability in a White Rabbit Network	698
	M. Lipiński, J. Serrano, T. Włostowski CERN, Geneva, Switzerland C. Prados GSI, Darmstadt, Germany
	White Rabbit (WR) is a time-deterministic, low-latency Ethernet-based network which enables transparent, sub-ns accuracy timing distribution. It is being developed to replace the General Machine Timing (GMT) system currently used at CERN and will become the foundation for the control system of the Facility for Antiproton and Ion Research (FAIR) at GSI. High reliability is an important issue in WR's design, since unavailability of the accelerator's control system will directly translate into expensive downtime of the machine. A typical WR network is required to lose not more than a single message per year. Due to WR's complexity, the translation of this real-world-requirement into a reliability-requirement constitutes an interesting issue on its own: a WR network is considered functional only if it provides all its services to all its clients at any time. This paper defines reliability in WR and describes how it was addressed by dividing it into sub-domains: deterministic packet delivery, data redundancy, topology redundancy and clock resilience. The studies show that the Mean Time Between Failure (MTBF) of the WR Network is the main factor affecting its reliability. Therefore, probability calculations for different topologies were performed using the "Fault Tree analysis" and analytic estimations. Results of the study show that the requirements of WR are demanding. Design changes might be needed and further in-depth studies required, e.g. Monte Carlo simulations. Therefore, a direction for further investigations is proposed.
	Slides WEMMU007 [0.689 MB]
	Poster WEMMU007 [1.080 MB]

WEMMU009	Status of the RBAC Infrastructure and Lessons Learnt from its Deployment in LHC	702
	W. Sliwinski, P. Charrue, I. Yastrebov CERN, Geneva, Switzerland
	The distributed control system for the LHC accelerator poses many challenges due to its inherent heterogeneity and highly dynamic nature. One of the important aspects is to protect the machine against unauthorised access and unsafe operation of the control system, from the low-level front-end machines up to the high-level control applications running in the control room. In order to prevent an unauthorized access to the control system and accelerator equipment and to address the possible security issues, the Role Based Access Control (RBAC) project was designed and developed at CERN, with a major contribution from Fermilab laboratory. Furthermore, RBAC became an integral part of the CERN Controls Middleware (CMW) infrastructure and it was deployed and commissioned in the LHC operation in the summer 2008, well before the first beam in LHC. This paper presents the current status of the RBAC infrastructure, together with an outcome and gathered experience after a massive deployment in the LHC operation. Moreover, we outline how the project evolved over the last three years and give an overview of the major extensions introduced to improve integration, stability and its functionality. The paper also describes the plans of future project evolution and possible extensions, based on gathered users requirements and operational experience.
	Slides WEMMU009 [0.604 MB]
	Poster WEMMU009 [1.262 MB]

WEMMU010	Dependable Design Flow for Protection Systems using Programmable Logic Devices	706
	M. Kwiatkowski, B. Todd CERN, Geneva, Switzerland
	Programmable Logic Devices (PLD) such as Field Programmable Gate Arrays (FPGA) are becoming more prevalent in protection and safety-related electronic systems. When employing such programmable logic devices, extra care and attention needs to be taken. It is important to be confident that the final synthesis result, used to generate the bit-stream to program the device, meets the design requirements. This paper will describe how to maximize confidence using techniques such as Formal Methods, exhaustive Hardware Description Language (HDL) code simulation and hardware testing. An example will be given for one of the critical function of the Safe Machine Parameters (SMP) system, one of the key systems for the protection of the Large Hadrons Collider (LHC) at CERN. The design flow will be presented where the implementation phase is just one small element of the whole process. Techniques and tools presented can be applied for any PLD based system implementation and verification.
	Slides WEMMU010 [1.093 MB]
	Poster WEMMU010 [0.829 MB]

WEMMU011	Radiation Safety Interlock System for SACLA (XFEL/SPring-8)	710
	M. Kago, T. Matsushita, N. Nariyama, C. Saji, R. Tanaka, A. Yamashita JASRI/SPring-8, Hyogo-ken, Japan Y. Asano, T. Hara, T. Itoga, Y. Otake, H. Takebe RIKEN/SPring-8, Hyogo, Japan H. Tanaka RIKEN SPring-8 Center, Sayo-cho, Sayo-gun, Hyogo, Japan
	The radiation safety interlock system for SACLA (XFEL/SPring-8) protects personnel from radiation hazards. The system controls access to the accelerator tunnel, monitors the status of safety equipment such as emergency stop buttons, and gives permission for accelerator operation. The special feature of the system is a fast beam termination when the system detects an unsafe state. A total beam termination time is required less than 16.6 ms (linac operation repetition cycle: 60 Hz). Especially important is the fast beam termination when the electron beams deviates from the proper transport route. Therefore, we developed optical modules in order to transmit a signal at a high speed for a long distance (an overall length of around 700 m). An exclusive system was installed for fast judgment of a proper beam route. It is independent from the main interlock system which manages access control and so on. The system achieved a response time of less than 7ms, which is sufficient for our demand. The construction of the system was completed in February 2011 and the system commenced operation in March 2011. We will report on the design of the system and its detailed performance.
	Slides WEMMU011 [0.555 MB]
	Poster WEMMU011 [0.571 MB]