Beam Instrumentation Data Acquisition Using Gigabit Ethernet Communication Protocol
N. Eddy, J.S. Diamond, R.R. Santucci, V.E. Scarpine, A. Semenov, D. Slimmer, D.C. Voy
Fermilab, Batavia, Illinois, USA
Funding:This work was supported by the U.S. Department of Energy under contract No. DE-AC02-07CH11359. Fermilab’s PIP-II accelerator is pursuing the developing a new generalized DAQ system using gigabit ethernet as the communication protocol. The system uses standard rackmount servers and commodity ethernet switches for the front-end, which is a very low cost compared to standard platforms such as VME and uTCA. We use our own client-server protocol for GigE communication between the server and our custom in-house FPGA based digitizers. This allows for a lot of flexibility such that a single server can serve multiple different front-end systems (BPMs, current monitors, BLMs, etc). At PIP2IT, we have configured a system utilizing a single rackmount server and a 10-gigabit switch communicating with two VME crates housing digitizers for the BPM system. Each digitizer card is connected directly to the switch. The VME crates are just used for power and cooling. This talk will present the system architecture and initial results of operation at PIP2IT.
Automated Management of Libera SPARK Module IOCs in SPEAR3
51
F. Toufexis, S. Condamoor, W.J. Corbett, D.A. Morataya Campos, C.S. Ramirez, J.J. Sebek, C. Wermelskirchen
SLAC, Menlo Park, California, USA
P. Leban, M. Žnidarčič
I-Tech, Solkan, Slovenia
Funding:Work sponsored by US Department of Energy Contract DE-AC02-76SF00515. We are actively upgrading BPM processors in the SPEAR3 accelerator complex as several of the existing systems are reaching end-of-life. To consolidate the resources required for development and maintenance we have evaluated and installed several processors from the Libera SPARK hardware series. We found that two common deployment methods typically used with these modules, micro-SD card and network boot, are either hard to maintain or lack flexibility. Instead we have developed an automated method based on a network boot scheme where an external EPICS soft IOC manages the assignment of specific SPARK modules to physical BPMs in the accelerator. Each module queries the soft IOC at boot time to determine which BPM it is assigned to and then starts its IOC with the appropriate BPM prefix for the PV names. This deployment method allows for quick, seamless swapping of SPARK modules by machine operators or physicists. It addition, it allows us to bring additional modules online for testing, or to move modules to different locations with a different PV prefix for the new location. This method is applicable to other EPICS-enabled devices where the device hardware also hosts an IOC.
A New Flexible and Interactive Control System for the INFN-LNS Accelerators and Beamlines
G. Vecchio, S. Aurnia, S. Cavallaro, L. Cosentino, B.F. Diana, E. Furia, P.S. Pulvirenti, A.D. Russo
INFN/LNS, Catania, Italy
Interactive Graphics User Interfaces (GUI) and a new message exchange protocol are parts of the modern Control System designed and developed to control and monitor the accelerators and beamlines at Istituto Nazionale di Fisica Nucleare - Laboratori Nazionali del Sud (INFN LNS). We used the most innovative open source frameworks and architectures to build several kinds of applications: a web-based application, an interactive synoptic panel and a mobile app. The new protocol for the message exchange between the field devices and the control user interfaces uses the in-memory data structure store Redis as a message broker. Several outline tools allow the calculation of the beam intensity and the automatic acquisition of the beam contour for future beam replication. Moreover, a relational database is used to store all the machine and beamlines parameters every day for each experiment.
Funding:This work was supported by the Director, Office of Science, Office of Basic Energy Sciences, of the U.S. Department of Energy under Contract No. DE-AC02-05CH11231. The Advanced Light Source (ALS) is developing the High Speed Digitizer (HSD), a data acquisition system based on the latest Radio Frequency System-on-Chip (RFSoC) technology. The system includes 8 channels of 4GHz 4Gsps analog input, programmable gain, self calibration, and flexible data processing in firmware. The initial motivation for the HSD project was to develop a replacement for aging ZTEC oscilloscopes that would be more tightly integrated with the ALS Control System and Timing System than any available commercial oscilloscope. However, a general approach to the design makes the HSD system useful for other applications, including a Bunch Current Monitor, as well as for other facilities beyond ALS.
Self-Configuring IO Brick for General Purpose Data-Acquisition
R.W. Dickson
ORNL, Oak Ridge, Tennessee, USA
This talk will describe a simple, general-purpose data acquisition system that requires minimal configuration and no software programming by the user. The idea is to have a ready system that can be quickly placed in the field to perform a variety of measurements. Support for digital I/O, relays, analog input and output, thermocouple measurement, and strain (bridge) measurements are provided. The system uses National Instruments CompactRIO hardware and communicates to the user via an EPICS interface. All the user need do is plug in the type of modules needed for the measurement, and the system will auto discover this hardware, configure itself and communicate to EPICS EDM (and CSS BOY) screens. The screens will then also configure for the hardware selected. The system also supports hot-swapping to add or change hardware on-the-fly. Any changes are then reflected in the system’s displays. This system is being used in several instances at the SNS in a more permanent capacity than it was intended. In these cases, more specific EDM screens have been developed to visualize the same data that would normally be viewed with the dynamic screens.
Standardising of Application Specific Implementations at the Australian Synchrotron - ANSTO
R.B. Hogan, A. Michalczyk, A. Ng
AS - ANSTO, Clayton, Australia
There is a need for a flexible stand-alone device that can be a base platform for a distributed control system. It will need to support a core functionality such as; high-resolution timestamping, standardised software API’s and a well defined expansion card interface. We are proposing the Chameleon device that will be designed around a Xilinx Zynq System on Module (SoM) and include a standard VITA 57.1 HPC FMC for application specific functionality. The proposed solution will allow the use of COTS or in-house designed FMC modules and integrate to the control system through a PoE+ interface, allowing both power and communication through the same cable. The Chameleon device is also intended to be plugged into a White Rabbit network to utilise the high performance synchronisation capabilities and timestamping as needed. This device will reduce the cost of implementing application specific solutions, across the accelerator and beamlines, to better support the growing demands of scientific research at the Australian Synchrotron - ANSTO.
In every particle accelerators installed, electronics are exposed to a radiation field of mixed particles over a wide range of energies. There are several radiation-induced effects, some of which affect directly the functionalities of the electronic systems, as they have a direct impact upon the accelerator’s availability and experiment acquisitions. The risks related to radiation and to a radiation tolerant project flow, are investigated. In addition, the key concepts and challenges are described, aiming for high reliability in a radiation field. Finally, the development methodologies and the radiation hardness assurance procedures will be analysed with examples from the LHC.
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Direct Digitization and ADC Parameter Trade-off for Bunch-by-Bunch Signal Processing
288
I. Degl’Innocenti, L. Fanucci
Università di Pisa, Pisa, Italy
A. Boccardi, I. Degl’Innocenti, M. Wendt
CERN, Geneva, Switzerland
With the technology improvements of analog-to-digital converters in terms of sampling rate and achievable resolution, direct digitization of beam signals is of growing interest in the field of beam diagnostics. The selection of a state-of-the-art analog-to-digital converter for such a task imposes a trade-off between sampling frequency and resolution. Understanding the dependency of the system performance on these features is fundamental. This paper presents an analysis and design methodology for such architectures. Analytical tools are used to guide the designer and to estimate the system performance as a function of the analog-to-digital converter performance. These estimations are then validated by Monte-Carlo simulations. As an example of this methodology an analysis for the next-generation electronics of the Large Hadron Collider beam position monitoring system is presented. The analytical model and the results obtained are discussed, along with comparisons to beam measurements obtained at the Large Hadron Collider.
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High Performance Data Acquisition for a Modern Accelerator
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G. Shen, N.D. Arnold, T.G. Berenc, J. Carwardine, E. Chandler, T. Fors, T.J. Madden, D.R. Paskvan, C. Roehrig, S.E. Shoaf, S. Veseli
ANL, Lemont, Illinois, USA
Funding:Argonne National Laboratory’s work was supported by the U.S. Department of Energy, Office of Science, Office of Basic Energy Sciences, under contract DE-AC02-06CH11357 The modern and state-of-the-art technology provides great potential to acquire accelerator high speed data, and the possibility to fine tune the particle beam. The widely use of embedded controllers, like field-programmable gate arrays (FPGA, enriches the opportunity to collect fast data from accelerator technical subsystem, for example diagnostics and low-level radiofrequency (LLRF) for monitoring, statistics, diagnostics or fault recording of like. A modern embedded controller may contain several gigabytes of memory for such purposes. This presents a number of challenges related to data acquisition and data management to collect, transfer, manage, and utilize a large amount of data from numerous controllers. Currently at APS Upgrade project, a general purpose DAQ system is under active development, which interfaces with a number of technical subsystems to provide time-correlated and synchronously sampled data acquisition for commissioning, performance monitoring, troubleshooting and early fault detection. This paper will present the status and progress of APS-U general purpose DAQ system, and its use cases at APS-U project.
