Keyword: FPGA
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THPSC33 Digital Signal Processing Algorithms for Linac Low-Level RF Systems controls, operation, cavity, embedded 392
 
  • D.A. Liakin, S.V. Barabin, A.Y. Orlov
    ITEP, Moscow, Russia
 
  A set of LLRF systems had been designed for various applications of resonant RF devices such as accelerators or beam deflectors. This report presents compact signal detection algorithms, used in most of developed systems. Application-specific extension of the signal processing procedure allows the system be synchronized to external self-excited oscillator.  
poster icon Poster THPSC33 [13.540 MB]  
 
THPSC34 A Digital Low-Level RF System for Resonant Beam Deflector of LAPLAS Experiment LLRF, controls, interface, operation 395
 
  • D.A. Liakin, S.V. Barabin, A.Y. Orlov
    ITEP, Moscow, Russia
 
  A two-resonator heavy ion deflecting system is a part of LAPLAS experiment. ITEP built and put into operation a lightweight prototype of a deflector. Developed high performance radio-frequency control unit provides all necessary options for successful operation in LAPLAS or ITEP installations. The LLRF includes a two-channel reference generator based on a digital signal processing core and resonant frequency control modules, also powered by an appropriate DSP.  
poster icon Poster THPSC34 [8.708 MB]