ICALEPCS2021 - List of Authors (Do Carmo, L.P.)

Paper	Title	Page
TUPV004	The FPGA-Based Control Architecture, EPICS Interface and Advanced Operational Modes of the High-Dynamic Double-Crystal Monochromator for Sirius/LNLS	370
	R.R. Geraldes, J.L. Brito Neto, E.P. Coelho, L.P. Do Carmo, A.Y. Horita, S.A.L. Luiz, M.A.L. Moraes LNLS, Campinas, Brazil
	Funding: Ministry of Science, Technology and Innovation (MCTI) The High-Dynamic Double-Crystal Monochromator (HD-DCM) has been developed since 2015 at Sirius/LNLS with an innovative high-bandwidth mechatronic architecture to reach the unprecedented target of 10 nrad RMS (1 Hz - 2.5 kHz) in crystals parallelism also during energy fly-scans. After the initial work in Speedgoat’s xPC rapid prototyping platform, for beamline operation the instrument controller was deployed to NI’s CompactRIO (cRIO), as a rugged platform combining FPGA and real-time capabilities. Customized libraries needed to be developed in LabVIEW and a heavily FPGA-based control architecture was required to finally reach a 20 kHz control loop rate. This work summarizes the final control architecture of the HD-DCM, highlighting the main hardware and software challenges; describes its integration with the EPICS control system and user interfaces; and discusses its integration with an undulator source. *Geraldes, R. R., et al. "The status of the new High-Dynamic DCM for Sirius." Proc. MEDSI 2018 (2018).
	Poster TUPV004 [2.549 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2021-TUPV004
About •	Received ※ 13 October 2021 Accepted ※ 20 November 2021 Issue date ※ 27 November 2021
Cite •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THPV021	TATU: A Flexible FPGA-Based Trigger and Timer Unit Created on CompactRIO for the First Sirius Beamlines	908
	J.R. Piton, D. Alnajjar, D.H.C. Araujo, J.L. Brito Neto, L.P. Do Carmo, L.C. Guedes, M.A.L. Moraes LNLS, Campinas, Brazil
	In the modern synchrotron light sources, the higher brilliance leads to shorter acquisition times at the experimental stations. For most beamlines of the fourth-generation source SIRIUS, it was imperative to shift from the usual software-based synchronization of operations to the much faster triggering by hardware of some key equipment involved in the experiments. As a basis of their control system for devices, the SIRIUS beamlines have standard CompactRIO controllers and I/O modules along the hutches. Equipped with a FPGA and a hard processor running Linux Real-Time, this platform could deal with the triggers from and to other devices, in the order of ms and µs. TATU (Time and Trigger Unit) is a code running in a CompactRIO unit to coordinate multiple triggering conditions and actions. TATU can be either the master pulse generator or the follower of other signals. Complex trigger pattern generation is set from a user-friendly standardized interface. EPICS process variables (by means of LNLS Nheengatu) are used to set parameters and to follow the execution status. The concept and first field test results in at least four SIRIUS beamlines are presented. D. Alnajjar, G. S. Fedel, and J. R. Piton, "Project Nheengatu: EPICS support for CompactRIO FPGA and LabVIEW-RT", ICALEPCS’19, New York, NY, USA, Oct. 2019, paper WEMPL002.
	Poster THPV021 [0.618 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2021-THPV021
About •	Received ※ 10 October 2021 Accepted ※ 21 November 2021 Issue date ※ 02 February 2022
Cite •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

Paper

Title

Page

The FPGA-Based Control Architecture, EPICS Interface and Advanced Operational Modes of the High-Dynamic Double-Crystal Monochromator for Sirius/LNLS

370

R.R. Geraldes, J.L. Brito Neto, E.P. Coelho, L.P. Do Carmo, A.Y. Horita, S.A.L. Luiz, M.A.L. Moraes
LNLS, Campinas, Brazil

Funding: Ministry of Science, Technology and Innovation (MCTI)
The High-Dynamic Double-Crystal Monochromator (HD-DCM) has been developed since 2015 at Sirius/LNLS with an innovative high-bandwidth mechatronic architecture to reach the unprecedented target of 10 nrad RMS (1 Hz - 2.5 kHz) in crystals parallelism also during energy fly-scans. After the initial work in Speedgoat’s xPC rapid prototyping platform, for beamline operation the instrument controller was deployed to NI’s CompactRIO (cRIO), as a rugged platform combining FPGA and real-time capabilities. Customized libraries needed to be developed in LabVIEW and a heavily FPGA-based control architecture was required to finally reach a 20 kHz control loop rate. This work summarizes the final control architecture of the HD-DCM, highlighting the main hardware and software challenges; describes its integration with the EPICS control system and user interfaces; and discusses its integration with an undulator source.
*Geraldes, R. R., et al. "The status of the new High-Dynamic DCM for Sirius." Proc. MEDSI 2018 (2018).

Poster TUPV004 [2.549 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2021-TUPV004

About •

Received ※ 13 October 2021 Accepted ※ 20 November 2021 Issue date ※ 27 November 2021

Cite •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THPV021

TATU: A Flexible FPGA-Based Trigger and Timer Unit Created on CompactRIO for the First Sirius Beamlines

908

J.R. Piton, D. Alnajjar, D.H.C. Araujo, J.L. Brito Neto, L.P. Do Carmo, L.C. Guedes, M.A.L. Moraes
LNLS, Campinas, Brazil

In the modern synchrotron light sources, the higher brilliance leads to shorter acquisition times at the experimental stations. For most beamlines of the fourth-generation source SIRIUS, it was imperative to shift from the usual software-based synchronization of operations to the much faster triggering by hardware of some key equipment involved in the experiments. As a basis of their control system for devices, the SIRIUS beamlines have standard CompactRIO controllers and I/O modules along the hutches. Equipped with a FPGA and a hard processor running Linux Real-Time, this platform could deal with the triggers from and to other devices, in the order of ms and µs. TATU (Time and Trigger Unit) is a code running in a CompactRIO unit to coordinate multiple triggering conditions and actions. TATU can be either the master pulse generator or the follower of other signals. Complex trigger pattern generation is set from a user-friendly standardized interface. EPICS process variables (by means of LNLS Nheengatu*) are used to set parameters and to follow the execution status. The concept and first field test results in at least four SIRIUS beamlines are presented.
* D. Alnajjar, G. S. Fedel, and J. R. Piton, "Project Nheengatu: EPICS support for CompactRIO FPGA and LabVIEW-RT", ICALEPCS’19, New York, NY, USA, Oct. 2019, paper WEMPL002.

Poster THPV021 [0.618 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2021-THPV021

About •

Received ※ 10 October 2021 Accepted ※ 21 November 2021 Issue date ※ 02 February 2022

Cite •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)