Experimental Data Acquisition
Paper Title Page
WEPD09 Fast Data Acquisition System for Booster Supplies Readback 18
 
  • K. Saifee, A. Chauhan, P. Fatnani, P. Gothwal, C.P. Navathe
    RRCAT, Indore (M.P.), India
 
  The booster synchrotron at RRCAT is used to inject electron beam in Synchrotron Radiation Sources Indus-1 & Indus-2. The booster gets 20 MeV beam from Microtron, ramps up its energy to 450/550 MeV which is then extracted for injection in Indus-1/Indus-2. The ramping cycle repeats every second. For this, various magnet power supplies are fed with synchronous reference voltage & current waveforms and accordingly they feed the magnets with current waveforms of ~800 msec. A system was required to synchronously capture data of all power supplies to analyze changes on cycle to cycle basis. Global data acquisition system polling data at 1 Hz can't acquire sufficient points to do this. So a VME and PC based system has been developed for parallel and fast capture of data from 13 such power supplies. VME station has a CPU,13 ADC cards and one control card. User can select- permit to capture, start delay, samples and time interval between samples. Advantages are' Isolated, simultaneous capturing on 13-channels, capturing synchronized with an event and selectable capturing-rate and samples. It involved reconfiguring ADC boards, developing RTOS OS-9 Device Driver & programs for CPU Board and GUI for PC using LabVIEW.  
 
WEPD10 Embedded CAMAC Controller: Hardware/Software Co-optimization for High Throughput 20
 
  • P.M. Nair, A. Behere, M.P. Diwakar, K. Jha, C.K. Pithawa, P. Sridharan
    BARC, Trombay, Mumbai, India
 
  Advances in technology have resulted in availability of low-power, low form-factor embedded PC based modules. The Embedded CAMAC Controller (ECC) is designed with ETX standard Single Board Computer having PC architecture with Ethernet connectivity. The paper highlights the software and hardware design optimizations to meet high throughput requirements of multi-parameter experiments and scan mode accelerator control applications. The QNX based software is designed for high throughput by adopting design strategies like multi-threaded architecture, interrupt-driven data transfer, buffer pool for burst data, zero memory copy, lockless primitives and batched event data transfer to host. The data buffer and all control logic for CAMAC cycle sequencing for LIST mode is implemented entirely in hardware in Field Programmable Gate Array (FPGA). Through this design, sustained throughput of 1.5MBps has been achieved. Also, the host connectivity through Ethernet link enables support for multi-crate configuration, thus providing scalability. The ECC has been installed for accelerator control at FOTIA BARC, Pelletron and LINAC Pelletron TIFR and for multi-parameter experiments at NPD.  
 
WEPD11 Client Server Architecture Based Embedded Data Acquisition System on PC104 23
 
  • J.J. Patel, P.K. Chattopadhyay, R. Jha, P. Kumari, R. Rajpal
    IPR, Bhat, Gandhinagar, India
 
  The data acquisition system is designed on embedded PC104 platform Single Board Computer (SBC) with running Windows XP Embedded operating system. This is a multi channel system which consists of 12 Bit, 10 MSPS Analog to Digital Converters with on board FIFO memory for each channel. The digital control and PC104 bus interface logic are implemented using Very High Speed Hardware Description Language (VHDL) on Complex Programmable Logic Device (CPLD). The system has provision of software, manual as well as isolated remote trigger option. The Client Server based application is developed using National Instrument CVI for remote continuous and single shot data acquisition for basic plasma physics experiments. The software application has features of remote settings of sampling rate, selection of operation mode, data analysis using plot and zoom features. The embedded hardware platform can be configured to be used in different way according to the physics experiment requirement by different top level software architecture. The system is tested for different physics experiments. The detailed hardware and software design, development and testing results will be discussed in the paper.  
poster icon Poster WEPD11 [1.016 MB]  
 
WEPD12 A Large Channel Count Multi Client Data Acquisition System for Superconducting Magnet System of SST-1 26
 
  • K.J. Doshi, J.A. Dhongde, Y.S. Khristi, H.A. Masand, B.A. Parghi, D.A. Patel, S. Pradhan, U.A. Prasad, A.N. Sharma, P.A. Varmora
    IPR, Bhat, Gandhinagar, India
 
  The magnet system of the steady-state superconducting tokamak-1 at the Institute for Plasma Research, Gandhinagar, India, consists of sixteen Toroidal field and nine poloidal field Superconducting coils together with a pair of resistive PF coils, an air core ohmic transformer and a pair of vertical field coils. These coils are instrumented with various cryogenic grade sensors and voltage taps to monitor it's operating status and health during different operational scenarios. A VME based data acquisition system with remote system architecture is implemented for data acquisition and control of the complete magnet operation. Client-Server based architecture is implemented with remote hardware configuration and continuous online/ offline monitoring. A JAVA based platform independent client application is developed for data analysis and data plotting. The server has multiple data pipeline architecture to send data to storage database, online plotting application, Numerical display screen, and run time calculation. This paper describes software architecture, design and implementation of the data acquisition system.  
poster icon Poster WEPD12 [1.959 MB]  
 
WEPD13 Serial Multiplexed Based Data Acquisition and Control System 29
 
  • N.C. Patel, C.K. Chavda, K.G. Patel
    IPR, Bhat, Gandhinagar, India
 
  Data acquisition and control system consist of analog to digital converter, digital to analog converter, timer, counter, pulse generation, digital input / output etc depending upon requirement. All the components of the system must communicate with personal computer (PC) for data and control signal transmission using any one of the communication protocol like Serial, Parallel, USB, and GPIB etc. Serial communication is advantageous over other protocol like long distance data transmission, less number of physical connection, ease of implementation etc. The developed serial multiplexed system can control different module like ADC (for a small analog channel density, moderate sampling rate and local on-board memory) module, DAC (for controlling pressure valve, biasing voltage etc) module, DIO ( for system status monitoring and status control) module, Timer card ( for generating delayed pulse for triggering and synchronizing with other system) using single serial port. A LabVIEW based GUI program is developed for the individual communication of each module.  
poster icon Poster WEPD13 [1.603 MB]  
 
WEPD14 VEPP-2000 Logging System 32
 
  • A.I. Senchenko, D.E. Berkaev
    BINP SB RAS, Novosibirsk, Russia
 
  The electron-positron collider VEPP-2000 has been constructed in the Budker INP at the beginning of 2007 year. The first experiments on high-energy physics has been started at the end of 2009. The collider state is characterized by many parameters which have to be tracked. These parameters called channels could be divided into continuous (like beam current or beam energy) and pulsed. The main difference is that the first one related to the moment of time while the second one to the beam transport event. There are approximately 3000 continuous channels and about 500 pulsed channels at the VEPP-2000 facility. The Logging system consists of server layer and client layer. Server side are a specialized server with an intermediate embedded database aimed at saving data in case of external database fault. Client layer provide data access via API, CLI and WUI. The system has been deployed and is used as primary logging system on VEPP2000.  
poster icon Poster WEPD14 [2.523 MB]  
 
WEPD16 Development of Data Acquisition Software for VME Based System 35
 
  • A. Kumar, A. Chatterjee, K. Mahata, K. Ramachandran
    BARC, Mumbai, India
 
  A Data Acquisition system for VME has been developed for use in accelerator based experiments. It is in use at BARC-TIFR laboratory. The development was motivated by the growing demand for higher throughput in view of the increasing size of experiments. The VME based data acquisition system provides a powerful alternative to CAMAC standards on account of higher readout speeds (100 ns/word) resulting in reduced dead time. Further, high density VME modules are capable of providing up to 640 channels in a single VME crate with 21 slots. The software system LAMPS[1], earlier developed for CAMAC based system and used extensively in our laboratory and elsewhere has been modified for the present VME based system. The system makes use of the VME library to implement Chain Block Transfer Readout (CBLT) and gives the option of both Polling and Interrupt mode to acquire data. Practical throughput of ~250 ns/word in zero-suppressed mode have been achieved. The developed software currently supports CAEN[2] V785 ADC, V775 TDC and V862 QDC and V830 Scalar Modules. The design, development and architecture of this DAQ system will be discussed.
[1] http://www.tifr.res.in/~pell/lamps.html
[2] http://caen.it/
 
 
WEPD18 Microcontroller Based DAQ System for IR Thermography by Hot and Cold Water Flow 37
 
  • M.S. Khan, S.M. Belsare, K.D. Galodiya, S.S. Khirwadkar, T.H. Patel
    IPR, Bhat, Gandhinagar, India
 
  There are many Non Destructive Technique used in science and industry to evaluate the properties of a material, component or system without causing damage Infrared Thermography is one of them. Different types of IR thermo-graphy are used for different purpose. We are using hot and cold-water flow IR Thermography method to evaluate the Performance of Plasma Facing Components (PFC) for Divertor Mock-up. The Set-up is designed in such a way that hot and Called Water can flow in both direction inside mockup, like left to right and right to Left using electric motor. Eight numbers of Solenoid Valves have been used for selection of Water Flow Direction, thermo-couples for temperature measurement of water, IR camera to take the images and many others devices. Which needs a very good and versatile DAC system. We have developed a DAC system usingμcontroller and LabView for the acquisition of various parameters and controlling & synchronization of other system. Development of DAC is described in this paper  
poster icon Poster WEPD18 [0.466 MB]  
 
WEPD19 Smart Structured Measurement Process for Versatile Synchrotron Beamline Data at ANKA 40
 
  • T. Spangenberg, D. Haas, W. Mexner
    KIT, Karlsruhe, Germany
 
  An unstructured measurement process might deliver the needed quantity of primary data for an experiment. But the achievement of the scientific results depends more and more from the offered opportunities of embedding these measurement data into its specific context with a meta data description and a complete life cycle management. Obviously the design of a measurement process influences the potential applicability of an experimental setup for its scientific purpose and of course its options to fulfill a contemporary data management. ANKA's Tango based environment offers in principal varying approaches with different implementation efforts and coverage of scientific or information technology requirements. At ANKA we have set up a smart structured measurement process which stand out due to its seamless integration into the overall data management, the support of recent control concepts for fast data generation as well as its support of well time-tested SPEC based scan systems. The presented measurement process focuses to the minimal implementation for all involved components without a break of well accepted habits.  
poster icon Poster WEPD19 [1.157 MB]  
 
WEPD22 Post-Mortem Analysis of BPM-Interlock Triggered Beam Dumps at PETRA-III 43
 
  • G.K. Sahoo, K. Balewski, A. Kling
    DESY, Hamburg, Germany
 
  PETRA-III is a 3rd generation synchrotron light source dedicated to users at 14 beam lines with 30 instruments. This operates with several filling modes such as 60, 240 and 320 bunches with 100mA or 40 bunches with 80mA at a positron beam energy of 6 GeV. The horizontal beam emittance is 1nmrad while a coupling of 1% amounts to a vertical emittance of 10pmrad. During a user run unscheduled beam dumps triggered by Machine Protection System may occur. In many cases the reason can be identified but in some it remains undetected. Though the beam is lost some signature is left in the ring buffers of the 226 BPM electronics where last 16384 turns just before the dump are available for post-mortem analysis. Scrutinizing turn by turn orbits and the frequency spectrum measured at a BPM can improve understanding of such a beam loss and may help to increase the efficiency of operation by eliminating the sources. Here we discuss in detail the functionality of a Java GUI used to investigate the reasons for unwanted dumps. In particular, the most effective corrector method is applied to identify correctors that might have perturbed the golden orbit leading to violations of the interlock limits.  
 
FRCC04 Digital Pulse Processing Techniques for High Resolution Amplitude Measurement of Radiation Detector 279
 
  • P. Singhai, P. Dhara, A. Roy
    VECC, Kolkata, India
  • S. Chatterjee
    HITK, Kolkata, India
 
  The digital pulse processing techniques for high resolution amplitude measurement of radiation detector pulse is an effective replacement of expensive and bulky analog processing as the digital domain offers higher channel density and at the same time it is cheaper. We have demonstrated a prototype digital setup with high-speed sampling ADC with sampling frequency of 80-125 MHz followed by series of IIR filters for pulse shaping in a trigger-less acquisition mode. The IIR filters, peak detection algorithm and the data write-out logic was written on VHDL and implemented on FPGA. We used CAMAC as the read out platform. In conjunction with the full hardware implementation we also used a mixed-platform with VME digitizer card with raw-sample read out using C code. The rationale behind this mixed platform is to test out various filter algorithms quickly on C and also to benchmark the performance of the chip level ADCs against the standard commercial digitizer in terms of noise or resolution. The paper describes implementation of both the methods with performance obtained in both the methods.  
slides icon Slides FRCC04 [1.248 MB]