ANL, Lemont, Illinois, USA
BNL, Upton, New York, USA
The Advanced Photon Source upgrade (APS-U) Multi-Bend Acromat (MBA) storage ring utilizes on-axis swap-out injection requiring up to 20nC charge per electron bunch. Enforcement of radiation safety limits for the new storage ring will be accomplished by a new beam charge monitor interlock that accumulates beam charge measurements in the Booster-to-Storage ring (BTS) transfer line and disables injection when the charge limit over a preset time period is exceeded. The new interlock is based on the existing APS Beam Shut-Off Current Monitor (BESOCM), and incorporates significant improvements over the existing system. New features include use of direct digitization and FPGA processing, extensive remote monitoring capabilities, expanded self-test and fail-safe functions, and the ability to adjust settings and monitor status remotely via EPICS. The new device integrates a test pulse (self-check) feature that verifies the integrity of the integrating beam current transformer (ICT) and cable system used to detect the beam signal. This paper describes the new BTS interlock (BESOCM) design and presents results of bench test and in-machine evaluation of the prototype and production units.
BNL, Upton, New York, USA
Brookhaven National Laboratory (BNL), Electron-Ion Collider, Upton, New York, USA
Many beam instrumentation systems at Brookhaven National Laboratory¿s Collider-Accelerator complex are over 20 years old and in need of upgrading due to obsolete components, old technology and the desire to provide improved performance and enhanced capabilities. In addition, many new beam instrumentation systems will be developed for the future Electron Ion Collider (EIC) that will be housed in the existing Relativistic Heavy Ion Collider (RHIC) tunnel. A new BNL designed custom hardware architecture is planned for both upgrades in the existing facility and new systems for the EIC. A general-purpose carrier board based on the Xilinx Zynq Ultrascale+ System-on-Chip (SoC) will interface with a family of application specific daughter cards to satisfy the requirements for each system. This paper will present the general architecture that is planned, as well as details for some of the application specific daughter cards that will be developed.
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