ICALEPCS2017 - List of Authors (Xu, C.)

Paper	Title	Page
THMPL08	The SLAC Common-Platform Firmware for High-Performance Systems	1286
	T. Straumann, R. Claus, J.M. D'Ewart, J.C. Frisch, G. Haller, R.T. Herbst, B. Hong, U. Legat, L. Ma, J.J. Olsen, B.A. Reese, R. Ruckman, L. Sapozhnikov, S.R. Smith, D. Van Winkle, J.A. Vásquez, M. Weaver, E. Williams, C. Xu, A. Young SLAC, Menlo Park, California, USA
	Funding: Work supported by the US Department of Energy, Office of Science under contract DE-AC02-76SF00515 LCLS-II's high beam rate of almost 1MHz and the requirement that several "high-performance" systems (such as MPS, BPM, LLRF, timing etc.) shall resolve individual bunches precludes the use of a traditional software based control system but requires many core services to be implemented in FPGA logic. SLAC has created a comprehensive open-source firmware framework which implements many commonly used blocks (e.g., timing, globally-synchronized fast data buffers, MPS, diagnostic data capture), libraries (Ethernet protocol stack, AXI interconnect, FIFOs, memory etc.) and interfaces (e.g., for timing, diagnostic data etc.) thus providing a versatile platform on top of which powerful high-performance systems can be built and rapidly integrated.
	Slides THMPL08 [0.579 MB]
	Poster THMPL08 [0.630 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-THMPL08
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THPHA075	FPGA-based BPM Data Acquisition for LCLS-II	1560
	T. Straumann, S. L. Hoobler, J.J. Olsen, C. Xu, A. Young SLAC, Menlo Park, California, USA
	The LCLS-II facility currently under construction at SLAC will be capable of delivering an electron beam at a rate of up to almost 1MHz. The BPM system (and other diagnostics) are required to acquire time-stamped readings for each individual bunch. The high rate mandates that the processing algorithms as well as data exchange with other high-performance systems such as MPS (machine-protection system) or bunch-length monitors are implemented with FPGA technology. Our BPM-processing firmware builds on top of the SLAC "common-platform" [] and integrates tightly with core services provided by the platform such as timing, data-buffering and communication channels. "The SLAC Common-Platform Firmware for High-Performance Systems"; submission #3014 to ICALEPCS 2017.
	Poster THPHA075 [6.604 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-THPHA075
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

Paper

Title

Page

The SLAC Common-Platform Firmware for High-Performance Systems

1286

T. Straumann, R. Claus, J.M. D'Ewart, J.C. Frisch, G. Haller, R.T. Herbst, B. Hong, U. Legat, L. Ma, J.J. Olsen, B.A. Reese, R. Ruckman, L. Sapozhnikov, S.R. Smith, D. Van Winkle, J.A. Vásquez, M. Weaver, E. Williams, C. Xu, A. Young
SLAC, Menlo Park, California, USA

Funding: Work supported by the US Department of Energy, Office of Science under contract DE-AC02-76SF00515
LCLS-II's high beam rate of almost 1MHz and the requirement that several "high-performance" systems (such as MPS, BPM, LLRF, timing etc.) shall resolve individual bunches precludes the use of a traditional software based control system but requires many core services to be implemented in FPGA logic. SLAC has created a comprehensive open-source firmware framework which implements many commonly used blocks (e.g., timing, globally-synchronized fast data buffers, MPS, diagnostic data capture), libraries (Ethernet protocol stack, AXI interconnect, FIFOs, memory etc.) and interfaces (e.g., for timing, diagnostic data etc.) thus providing a versatile platform on top of which powerful high-performance systems can be built and rapidly integrated.

Slides THMPL08 [0.579 MB]

Poster THMPL08 [0.630 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-THMPL08

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THPHA075

FPGA-based BPM Data Acquisition for LCLS-II

1560

T. Straumann, S. L. Hoobler, J.J. Olsen, C. Xu, A. Young
SLAC, Menlo Park, California, USA

The LCLS-II facility currently under construction at SLAC will be capable of delivering an electron beam at a rate of up to almost 1MHz. The BPM system (and other diagnostics) are required to acquire time-stamped readings for each individual bunch. The high rate mandates that the processing algorithms as well as data exchange with other high-performance systems such as MPS (machine-protection system) or bunch-length monitors are implemented with FPGA technology. Our BPM-processing firmware builds on top of the SLAC "common-platform" [*] and integrates tightly with core services provided by the platform such as timing, data-buffering and communication channels.
* "The SLAC Common-Platform Firmware for High-Performance Systems"; submission #3014 to ICALEPCS 2017.

Poster THPHA075 [6.604 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-THPHA075

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)