Paper | Title | Page |
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FRCC02 | A FPGA Based High Speed Data Acquisition Card | 271 |
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Funding: Bhabha Atomic Research Centre, Nuclear Physics Division A FPGA based, high speed,two channel,analog input card with a maximum input sampling rate of 1 Giga samples per second (Gsps)per channel has been designed and tested. The card has got an on-board cPCI interface but has been designed in a way that it can also work as a stand-alone system. The card can function as a platform for developing and evaluating different FPGA based hardware designs. Recently, the card has been used to develop a direct sampling Low Level RF (LLRF) controller for controlling the electromagnetic fields of a prototype heavy ion RFQ. It has also been tested for acquisition of data in nuclear physics experiments. Pulses from surface barrier and silicon strip detectors were acquired at an input sampling rate of 1 Gs/s employing 241Am and Am-Pu sources. The design developed for this makes use of pre-triggering. This paper discusses the functionality, salient design issues and features of the card. Finally the hardware designs of above mentioned applications related to different areas of LLRF control and nuclear pulse acquisition are explained and the results obtained are presented. |
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Slides FRCC02 [1.431 MB] | |