PCaPAC2012 - List of Authors (Bhagwat, P. V.)

Paper

Title

Page

Graphical User Interface (GUI) for Testing CAMAC modules

60

S. Kulkarni, P. V. Bhagwat, J.A. Gore, A.K. Gupta, S. Kailas
BARC, Mumbai, India

A new program (GUI) for testing CAMAC modules (CAMAC ADC, DAC, Input Gate, Output Register) is developed using Labview and dynamic link libraries (DLLs). On start-up, the program initializes the CAMAC Controller via PCI bus interface, thus enabling communication with CAMAC modules. It can test CAMAC modules through different controls like slider bars, buttons etc. and display status of individual channels with soft panel meters and LEDs. The GUI is extremely useful in troubleshooting hardware problems of CAMAC modules and also in developing new modules.

Poster WEPD27 [0.524 MB]

FRCC02

A FPGA Based High Speed Data Acquisition Card

271

J.A. Gore, P. V. Bhagwat, A. Chatterjee, S. Kailas, S. Kulkarni, K. Mahata, S.K. Pandit, V.V. Parkar, A. Shrivastava
BARC, Mumbai, India

Funding: Bhabha Atomic Research Centre, Nuclear Physics Division
A FPGA based, high speed,two channel,analog input card with a maximum input sampling rate of 1 Giga samples per second (Gsps)per channel has been designed and tested. The card has got an on-board cPCI interface but has been designed in a way that it can also work as a stand-alone system. The card can function as a platform for developing and evaluating different FPGA based hardware designs. Recently, the card has been used to develop a direct sampling Low Level RF (LLRF) controller for controlling the electromagnetic fields of a prototype heavy ion RFQ. It has also been tested for acquisition of data in nuclear physics experiments. Pulses from surface barrier and silicon strip detectors were acquired at an input sampling rate of 1 Gs/s employing ²⁴¹Am and Am-Pu sources. The design developed for this makes use of pre-triggering. This paper discusses the functionality, salient design issues and features of the card. Finally the hardware designs of above mentioned applications related to different areas of LLRF control and nuclear pulse acquisition are explained and the results obtained are presented.

Slides FRCC02 [1.431 MB]

Paper	Title	Page
WEPD27	Graphical User Interface (GUI) for Testing CAMAC modules	60
	S. Kulkarni, P. V. Bhagwat, J.A. Gore, A.K. Gupta, S. Kailas BARC, Mumbai, India
	A new program (GUI) for testing CAMAC modules (CAMAC ADC, DAC, Input Gate, Output Register) is developed using Labview and dynamic link libraries (DLLs). On start-up, the program initializes the CAMAC Controller via PCI bus interface, thus enabling communication with CAMAC modules. It can test CAMAC modules through different controls like slider bars, buttons etc. and display status of individual channels with soft panel meters and LEDs. The GUI is extremely useful in troubleshooting hardware problems of CAMAC modules and also in developing new modules.
	Poster WEPD27 [0.524 MB]

FRCC02	A FPGA Based High Speed Data Acquisition Card	271
	J.A. Gore, P. V. Bhagwat, A. Chatterjee, S. Kailas, S. Kulkarni, K. Mahata, S.K. Pandit, V.V. Parkar, A. Shrivastava BARC, Mumbai, India
	Funding: Bhabha Atomic Research Centre, Nuclear Physics Division A FPGA based, high speed,two channel,analog input card with a maximum input sampling rate of 1 Giga samples per second (Gsps)per channel has been designed and tested. The card has got an on-board cPCI interface but has been designed in a way that it can also work as a stand-alone system. The card can function as a platform for developing and evaluating different FPGA based hardware designs. Recently, the card has been used to develop a direct sampling Low Level RF (LLRF) controller for controlling the electromagnetic fields of a prototype heavy ion RFQ. It has also been tested for acquisition of data in nuclear physics experiments. Pulses from surface barrier and silicon strip detectors were acquired at an input sampling rate of 1 Gs/s employing ²⁴¹Am and Am-Pu sources. The design developed for this makes use of pre-triggering. This paper discusses the functionality, salient design issues and features of the card. Finally the hardware designs of above mentioned applications related to different areas of LLRF control and nuclear pulse acquisition are explained and the results obtained are presented.
	Slides FRCC02 [1.431 MB]