Paper | Title | Page |
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THPRC009 | IF-Mixture Performance During Cavity Conditioning at STF-KEK | 785 |
SPWR027 | use link to see paper's listing under its alternate paper code | |
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The Superconducting rf Test Facility (STF) at High Energy Accelerator Research Organization (KEK) was built for research and development of the International Linear Collider (ILC). In order to satisfy the stability requirement of the accelerating field, a digital low-level RF (LLRF) control system is employed. In this control system, signal from a cavity is down-converted into intermediate frequency (IF) signal before being digitized by analog-to-digital converter (ADC). In order to reduce the required number of ADCs, we proposed a technique that combines several IFs and to be read by a single ADC. Signal reconstruction of each IF is performed by digital signal processing. The performance of this technique, which is named IF-mixture, is reported in this paper. | ||
Poster THPRC009 [0.992 MB] | ||
DOI • | reference for this paper ※ https://doi.org/10.18429/JACoW-LINAC2016-THPRC009 | |
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THPRC011 | Single LLRF for Multi-Harmonic Buncher | 789 |
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Funding: Work supported by Michigan State University, National Science Foundation: NSF Award Number PHY-1102511. In this paper, a unique low level radio frequency (LLRF) controller designed for a multi-harmonic buncher (MHB) is presented. Different than conventional designs, the single LLRF output contains three RF frequencies (f1, f2 = 2*f1, f3 = 3*f1) and is fed to a wide band amplifier driving the MHB. The challenge is while driving f1, due to the non-linearity of the amplifier, the f2 and f3 terms will also be generated and will couple into the control of these two modes. Hence an active cancellation algorithm is used to suppress the nonlinear effect of the amplifier. It is demonstrated in a test that the designed LLRF is able to control the amplitude and phase of the three modes in-dependently. |
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Poster THPRC011 [1.944 MB] | ||
DOI • | reference for this paper ※ https://doi.org/10.18429/JACoW-LINAC2016-THPRC011 | |
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THPRC012 | Resonance Control System for the CEBAF Separator Upgrade | 792 |
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Funding: Authored by Jefferson Science Associates, LLC under U.S. DOE Contract No. DE-AC05-06OR23177. The Continuous Electron Beam Accelerator Facility (CEBAF) energy upgrade from 6 GeV to 12 GeV includes the installation of four new 748.5 MHz normal conducting deflecting cavities in the 5th pass extraction region. The RF system employs two digital LLRF systems controlling four normal conducting cavities in a vector sum setting. Cavity tune information of the individual cavities is obtained using a multiplexing scheme of the forward and reflected RF signals. Water skids equipped with heaters and valves are used to control resonance. A new FPGA-based hardware and EPICS-based predictive control algorithm has been developed to support reliable operation of the beam extraction process. This paper presents the architecture design of the existing hardware and software as well as a plan to develop a model predictive control system. |
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DOI • | reference for this paper ※ https://doi.org/10.18429/JACoW-LINAC2016-THPRC012 | |
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THPLR048 | Development of a Digital LLRF Control System at LNL | 966 |
SPWR009 | use link to see paper's listing under its alternate paper code | |
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The new Low-Level Radio Frequency (LLRF) control system for linear accelerator at Legnaro National Laboratories (LNL) of INFN is presently being commissioned. A digital Radio Frequency (RF) controller was implemented. Its goal is to stabilize the amplitude, the phase and the frequency of the superconducting cavities of the Linac. The resonance frequency of the low beta cavities is 80 MHz, while medium and high beta cavities resonate at 160 MHz. Each RF controller controls at the same time eight different cavities. The hardware complexity of the RF controller (RF IOC) is reduced by adopting direct RF sampling and the RF to baseband conversion method. The main hardware components are RF ADCs for the direct undersampling of the signals picked up from cavities, a Xilinx Kintek 7 FPGA for the signal processing and DACs for driving the power amplifiers and hence the cavities. In the RF IOC the serial communication between FPGA and ADCs and between FPGA and DACs is based on JESD204b standard. An RF front-end board (RFFE) is placed between cavities and the RF IOC. This is used to adapt the power level of the RF signal from the cavities to the ADCs and from the DACs to the power amplifiers. This paper addresses the LLRF control system focusing on the hardware design of the RF IOC and RFFE boards and on the first test results carried out with the new controller. | ||
DOI • | reference for this paper ※ https://doi.org/10.18429/JACoW-LINAC2016-THPLR048 | |
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