LINAC2014 - List of Keywords (FPGA)

Paper	Title	Other Keywords	Page
MOPP092	Compact Timing System with FPGA for SPring-8 Linac	timing, linac, gun, injection	270
	H. Dewa, H. Hanaki, S. Suzuki JASRI/SPring-8, Hyogo-ken, Japan
	Funding: This reserch was supported by TAKUMI project. A new timing system for SPring-8 linac was developed. It is a test system to confirm the possibility of replacing the current NIM module-based system. Although fast logic circuits can be made easily with NIM modules, they become complicated when they are used in a large system. The timing system for SPring-8 linac has been getting larger and larger after several improvements for injection to New SUBARU (NS), top-up injection for storage ring, low repetition operation for saving energy, fast alternative injection and so on. In order to simplify the system, we adopted FPGA technology that can run at a clock over 500 MHz. The new system has 50 NIM inputs and outputs on the front panel, which is installed in an 8U rack-mount box. It only has gun trigger parts of current system, but includes all of the circuit components used in the current system such as and/or logics, counter delay, fan in/out etc. Three clock sources for Synchrotron injection, NS injection, and linac solo use are available in the FPGA, and they can be changed rapidly according to the trigger sources. We describe here the details of test timing system, the results of timing jitter measurements.

TUPP041	Beam Current Monitor System of the European Spallation Source	electronics, EPICS, linac, controls	526
	H. Hassanzadegan, M. Donna, A. Jansson, H. Kocevar, A. Nordt ESS, Lund, Sweden U. Legat Cosylab, Ljubljana, Slovenia M. Werner DESY, Hamburg, Germany
	The Beam Current Monitor system of the ESS will be primarily used for beam current and charge measurements in absolute and differential modes. Moreover, it will provide a fast input to the Beam Interlock System, initiating a trigger to shut the beam off upon high beam loss detection. As the BCM system will be needed at an early stage for Linac commissioning, it needs to work successfully under non-optimal conditions, ex. short pulse and low current beams. It is planned to install in total 20 AC Current Transformers and one Fast Current Transformer along the Linac. The FCT will have a larger bandwidth and it will be used to measure the performance of the fast chopper of the Medium Energy Beam Transport with a rise time of 10 ns. A prototype based on a commercial ACCT and EPICS-integrated MTCA.4 electronics has been set up and successfully tested with an emulated beam. The ACCT signal has been FPGA processed to compensate for the offset and droop as well as filtering and synchronization to an external trigger. This paper gives an overview of the design and test results of the prototype ACCT system with an outlook to future modifications before installation in the ESS Linac.
	Poster TUPP041 [6.113 MB]

THPP130	Development of FPGA-based Predistortion-type Linearization Algorithms for Klystrons within Digital LLRF Control Systems for ILC-like Electron Accelerators	klystron, controls, LLRF, target	1162
	M. Omet Sokendai, Ibaraki, Japan B. Chase, P. Varghese Fermilab, Batavia, Illinois, USA T. Matsumoto, S. Michizono, T. Miura, F. Qiu KEK, Ibaraki, Japan
	Two different kinds of predistortion-type linearization algorithms have been implemented and compared on an FPGA within the digital LLRF control system the Advanced Superconducting Test Facility (ASTA) at the Fermi National Accelerator Laboratory (FNAL). The algorithms are based on 2nd order polynomial functions and lookup tables with interpolation by which complex correction factors are obtained. The algorithms were tested in an actual setup including a 5 MW klystron and a superconducting 9-cell TESLA-type cavity at ASTA. By this a proof of concept was demonstrated.
	Poster THPP130 [2.411 MB]

Paper

Title

Other Keywords

Page

MOPP092

Compact Timing System with FPGA for SPring-8 Linac

timing, linac, gun, injection

270

H. Dewa, H. Hanaki, S. Suzuki
JASRI/SPring-8, Hyogo-ken, Japan

Funding: This reserch was supported by TAKUMI project.
A new timing system for SPring-8 linac was developed. It is a test system to confirm the possibility of replacing the current NIM module-based system. Although fast logic circuits can be made easily with NIM modules, they become complicated when they are used in a large system. The timing system for SPring-8 linac has been getting larger and larger after several improvements for injection to New SUBARU (NS), top-up injection for storage ring, low repetition operation for saving energy, fast alternative injection and so on. In order to simplify the system, we adopted FPGA technology that can run at a clock over 500 MHz. The new system has 50 NIM inputs and outputs on the front panel, which is installed in an 8U rack-mount box. It only has gun trigger parts of current system, but includes all of the circuit components used in the current system such as and/or logics, counter delay, fan in/out etc. Three clock sources for Synchrotron injection, NS injection, and linac solo use are available in the FPGA, and they can be changed rapidly according to the trigger sources. We describe here the details of test timing system, the results of timing jitter measurements.

TUPP041

Beam Current Monitor System of the European Spallation Source

electronics, EPICS, linac, controls

526

H. Hassanzadegan, M. Donna, A. Jansson, H. Kocevar, A. Nordt
ESS, Lund, Sweden
U. Legat
Cosylab, Ljubljana, Slovenia
M. Werner
DESY, Hamburg, Germany

The Beam Current Monitor system of the ESS will be primarily used for beam current and charge measurements in absolute and differential modes. Moreover, it will provide a fast input to the Beam Interlock System, initiating a trigger to shut the beam off upon high beam loss detection. As the BCM system will be needed at an early stage for Linac commissioning, it needs to work successfully under non-optimal conditions, ex. short pulse and low current beams. It is planned to install in total 20 AC Current Transformers and one Fast Current Transformer along the Linac. The FCT will have a larger bandwidth and it will be used to measure the performance of the fast chopper of the Medium Energy Beam Transport with a rise time of 10 ns. A prototype based on a commercial ACCT and EPICS-integrated MTCA.4 electronics has been set up and successfully tested with an emulated beam. The ACCT signal has been FPGA processed to compensate for the offset and droop as well as filtering and synchronization to an external trigger. This paper gives an overview of the design and test results of the prototype ACCT system with an outlook to future modifications before installation in the ESS Linac.

Poster TUPP041 [6.113 MB]

THPP130

Development of FPGA-based Predistortion-type Linearization Algorithms for Klystrons within Digital LLRF Control Systems for ILC-like Electron Accelerators

klystron, controls, LLRF, target

1162

M. Omet
Sokendai, Ibaraki, Japan
B. Chase, P. Varghese
Fermilab, Batavia, Illinois, USA
T. Matsumoto, S. Michizono, T. Miura, F. Qiu
KEK, Ibaraki, Japan

Two different kinds of predistortion-type linearization algorithms have been implemented and compared on an FPGA within the digital LLRF control system the Advanced Superconducting Test Facility (ASTA) at the Fermi National Accelerator Laboratory (FNAL). The algorithms are based on 2nd order polynomial functions and lookup tables with interpolation by which complex correction factors are obtained. The algorithms were tested in an actual setup including a 5 MW klystron and a superconducting 9-cell TESLA-type cavity at ASTA. By this a proof of concept was demonstrated.

Poster THPP130 [2.411 MB]