Author: Duan, Q.M.
Paper Title Page
MOPAB080 The Development of Tune Measurement System Based on FPGA at HLSII Storage Ring 305
 
  • Q.M. Duan, Y.L. Yang
    USTC/NSRL, Hefei, Anhui, People's Republic of China
 
  A tune measurement system based on FPGA development board is developed at HLS II. The FPGA development board based on Zynq SOC, have ADC and DAC on board. The FPGA can provide two kinds of signal for exciting the beam: parametric frequency sweep signal and bandwidth limited white noise signal. The FFT algorithms and calculation of tune are running in the ARM CPU. In order to compare performance with the original system which is based on spectrum analyzer, we did experiments with new system based FPGA and original system respectively. The experiments on HLSII storage ring show that the tune measuring accuracy have reached 0.0006 / 0.0001 in horizontal and vertical direction based on sweep frequency of FPGA-based system.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2017-MOPAB080  
Export • reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)