| Paper |
Title |
Page |
| TUPAB043 |
Design and Simulation of Voltage Multiplier Column of a 300keV, 10mAParallel Fed Cockcroft Walton Electron Accelerator for Industrial Applications |
1421 |
| |
- M. Nazari, F. Abbasi Davani, F. Ghasemi
Shahid Beheshti University, Tehran, Iran
- S. Ahmadiannamin
ILSF, Tehran, Iran
|
|
| |
In this article a 300keV, 10mA multiplier column has been designed for a parallel fed Cockcroft Walton electron accelerator for industrial applications. The parallel fed Cockcroft Walton multiplier is a capacitive coupling multiplier with diode rectification which can convert an input RF voltage to a low ripple output DC voltage. In this research tried to get a low ripple (300keV output) dc voltage. At first, the voltage multiplier column has been simulated with pspice simulation software. After doing the pspice simulations, optimum value of different parameters has been get. At the end we try to get the optimum values of pspice simulations with a mechanical design with CST STODIO. The mechanical design of voltage multiplier and its equivalent circuit hah a good accordance with each other.
|
|
| DOI • |
reference for this paper
※ https://doi.org/10.18429/JACoW-IPAC2017-TUPAB043
|
|
| Export • |
reference for this paper using
※ BibTeX,
※ LaTeX,
※ Text/Word,
※ RIS,
※ EndNote (xml)
|
|
| |