Author: Coelho, E.P.
Paper Title Page
TUPV004 The FPGA-Based Control Architecture, EPICS Interface and Advanced Operational Modes of the High-Dynamic Double-Crystal Monochromator for Sirius/LNLS 370
  • R.R. Geraldes, J.L. Brito Neto, E.P. Coelho, L.P. Do Carmo, A.Y. Horita, S.A.L. Luiz, M.A.L. Moraes
    LNLS, Campinas, Brazil
  Funding: Ministry of Science, Technology and Innovation (MCTI)
The High-Dynamic Double-Crystal Monochromator (HD-DCM) has been developed since 2015 at Sirius/LNLS with an innovative high-bandwidth mechatronic architecture to reach the unprecedented target of 10 nrad RMS (1 Hz - 2.5 kHz) in crystals parallelism also during energy fly-scans. After the initial work in Speedgoat’s xPC rapid prototyping platform, for beamline operation the instrument controller was deployed to NI’s CompactRIO (cRIO), as a rugged platform combining FPGA and real-time capabilities. Customized libraries needed to be developed in LabVIEW and a heavily FPGA-based control architecture was required to finally reach a 20 kHz control loop rate. This work summarizes the final control architecture of the HD-DCM, highlighting the main hardware and software challenges; describes its integration with the EPICS control system and user interfaces; and discusses its integration with an undulator source.
*Geraldes, R. R., et al. "The status of the new High-Dynamic DCM for Sirius." Proc. MEDSI 2018 (2018).
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About • Received ※ 13 October 2021       Accepted ※ 20 November 2021       Issue date ※ 27 November 2021  
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