ICALEPCS2011 - List of Authors (Calvo, J.C.)

Paper

Title

Page

IFMIF LLRF Control System Architecture Based on Epics

339

J.C. Calvo, A. Ibarra, A. Salom
CIEMAT, Madrid, Spain
M.A. Patricio
UCM, Colmenarejo, Spain
M.L. Rivers
ANL, Argonne, USA

The IFMIF-EVEDA (International Fusion Materials Irradiation Facility - Engineering Validation and Engineering Design Activity) linear accelerator will be a 9 MeV, 125mA CW (Continuous Wave) deuteron accelerator prototype to validate the technical options of the accelerator design for IFMIF. The RF (Radio Frequency) power system of IFMIF-EVEDA consists of 18 RF chains working at 175MHz with three amplification stages each; each one of the required chains for the accelerator prototype is based on several 175MHz amplification stages. The LLRF system provides the RF Drive input of the RF plants. It controls the amplitude and phase of this signal to be synchronized with the beam and it also controls the resonance frequency of the cavities. The system is based on a commercial cPCI FPGA Board provided by Lyrtech and controlled by a Windows Host PC. For this purpose, it is mandatory to communicate the cPCI FPGA Board with an EPICS Channel Access, building an IOC (Input Output Controller) between Lyrtech board and EPICS. A new software architecture to design a device support, using AsynPortDriver class and CSS as a GUI (Graphical User Interface), is presented.

Poster MOPMS009 [2.763 MB]

Paper	Title	Page
MOPMS009	IFMIF LLRF Control System Architecture Based on Epics	339
	J.C. Calvo, A. Ibarra, A. Salom CIEMAT, Madrid, Spain M.A. Patricio UCM, Colmenarejo, Spain M.L. Rivers ANL, Argonne, USA
	The IFMIF-EVEDA (International Fusion Materials Irradiation Facility - Engineering Validation and Engineering Design Activity) linear accelerator will be a 9 MeV, 125mA CW (Continuous Wave) deuteron accelerator prototype to validate the technical options of the accelerator design for IFMIF. The RF (Radio Frequency) power system of IFMIF-EVEDA consists of 18 RF chains working at 175MHz with three amplification stages each; each one of the required chains for the accelerator prototype is based on several 175MHz amplification stages. The LLRF system provides the RF Drive input of the RF plants. It controls the amplitude and phase of this signal to be synchronized with the beam and it also controls the resonance frequency of the cavities. The system is based on a commercial cPCI FPGA Board provided by Lyrtech and controlled by a Windows Host PC. For this purpose, it is mandatory to communicate the cPCI FPGA Board with an EPICS Channel Access, building an IOC (Input Output Controller) between Lyrtech board and EPICS. A new software architecture to design a device support, using AsynPortDriver class and CSS as a GUI (Graphical User Interface), is presented.
	Poster MOPMS009 [2.763 MB]