| Paper |
Title |
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| WPPB39 |
130-MHz, 16-Bit Four-Channel Digitizer
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475 |
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- R. Akre, T. Straumann, K. D. Kotturi
SLAC, Menlo Park, California
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The PAD (Phase and Amplitude Detector) was designed to digitize high-speed analog input data with large dynamic range. Because of its high speed and high resolution processing capability, it has been useful to applications beyond measuring phase and amplitude of RF signals and klystron beam voltages. These applications include beam-position monitors, bunch-length monitors, and beam-charge monitors. The digitizer used is the Linear Technologies LTC2208. It was the first 16-bit digitizer chip on the market capable of running at 119MHz; it is specified to run up to 130MHz. For each channel, the 16-bit digitized signal from the LTC2208 is clocked into a 64k sample FIFO. Commercial FIFOs are available that store up to 256k samples in the same package. The data are then read from the FIFO into the Arcturus Coldfire uCDIMM. A CPLD is used to handle triggering, resetting the FIFO, interfacing the Coldfire processor to the 4 FIFOs, and interrupting the Coldfire processor. The processor runs RTEMS version 4.7 and EPICS 3.14.8.2. There is an optional add-on available that attaches to the QSPI port on the PAD for reading 8 slow, 24-bit analog signals.
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| WPPB40 |
LCLS Beam-Position Monitor Data Acquisition System
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478 |
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- R. Akre, R. G. Johnson, K. D. Kotturi, P. Krejcik, E. Medvedko, J. Olsen, S. Smith, T. Straumann
SLAC, Menlo Park, California
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In order to determine the transversal LCLS beam position from the signals induced by the beam in four stripline pickup electrodes, the BPM electronics have to process four concurrent short RF bursts with a dynamic range > 60dB. An analog front end conditions the signals for subsequent acquisition with a waveform digitizer and also provides a calibration tone that can be injected into the system in order to compensate for gain variations and drift. Timing of the calibration pulser and switches, as well as control of various programmable attenuators, is provided by an FPGA. Because no COTS waveform digitizer with the desired performance (>14bit, ≥119MSPS) was available, the PAD digitizer (see separate contribution WPPB39) was selected. It turned out that the combination of a waveform digitizer with a low-end embedded CPU running a real-time OS (RTEMS) and control system (EPICS) is extremely flexible and could very easily be customized for our application. However, in order to meet the BPM real-time needs (readings in < 1ms), a second Ethernet interface was added to the PAD so that waveforms can be shipped, circumventing the ordinary TCP/IP stack on a dedicated link.
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| RPPB19 |
Electron Bunch Length Measurement for LCLS at SLAC
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644 |
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- S. Allison, S. Chevtsov, P. Emma, K. D. Kotturi, H. Loos, S. Peng, D. Rogind, T. Straumann, S. Zelazny
SLAC, Menlo Park, California
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At Stanford Linear Accelerator Center (SLAC) a Bunch Length Measurement system has been developed to measure the length of the electron bunch for its new Linac Coherent Light Source (LCLS). This destructive measurement uses a transverse-mounted RF deflector (TCAV) to vertically streak the electron beam and an image taken with an insertable screen and a camera. The device control software was implemented with the Experimental Physics and Industrial Control System (EPICS) toolkit. The analysis software was implemented in Matlab using the EPICS/Channel Access Interface for Scilab and Matlab (labCA). This architecture allowed engineers and physicists to develop and integrate their control and analysis without duplication of effort.
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