Author: Wang, D.Y.
Paper Title Page
MOPP42
Several Key Circuit Designs in HEPS-FOFB  
 
  • Z.X. Xie, M.T. Kang, Z.C. Mu
    IHEP CSNS, Guangdong Province, People’s Republic of China
  • D.P. Jin, L. Zeng, Y.L. Zhang, P. Zhu
    IHEP, Beijing, People’s Republic of China
  • D.Y. Wang
    DNSC, Dongguan, People’s Republic of China
 
  The bunch size of HEPS is up to micrometer level, so it is very vulnerable to external interference. FOFB(Fast Orbit Feedback) is used to counteract external interference and improve beam quality. HEPS Fofb independently developed hardware equipment, used to collect 576 BPM data, and then distributed to 192 fast corrector power supply after matrix operation and PI operation. Fofb is divided into 16 sub-sites, each sub-site uses a single circuit main board, each site processes 36 BPM data, 24 (X & Y axis) corrector power supply. Two Xilinx FPGA chips are mounted on the circuit board, one is for high-speed data processing, the other is network transmission and low-speed data processing. Because the single board processing business is very large, there are more than 15 channels of high current and low noise power supply, more than 60 channels of low jitter clock, and tens of centimeters of 10Gbps high-speed transmission path. This paper will introduce the simulation and design of power supply, clock and high-speed transmission in detail.  
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