Author: Napieralski, A.
Paper Title Page
MOP292 Universal FMC-Compliant Module for xTCA Systems 663
 
  • D.R. Makowski, G.W. Jabłoński, T. Kozak, A. Mielczarek, A. Napieralski
    TUL-DMCS, Łódź, Poland
 
  Funding: The research leading to these results has received funding from Polish National Science Council Grant 642/N-TESLAXFEL/09/2010/0.
The Advanced Telecommunications Computing Architecture (ATCA), MicroTCA (uTCA) and Advanced Mezzanine Card (AMC) standards, known as xTCA, provide unique features desired by various control systems of particle accelerators. The standards provide availability and operability as high as 99.999 %. A significant number of additional features must be implemented to take a full advantage of xTCA standards and gain the required availability. On the other hand, many control systems require various data acquisition and control modules with different number of input analogue and digital inputs or outputs as defined by their respective system specifications. The paper presents an universal base module, designed according to the AMC standard with an FPGA Mezzanine Card connector, that can be used for fast development of input-output subsystems. The module consists of two submodules. The digital part is designed according to the AMC standard while the main input-output functionality is realized by the FPGA Mezzanine Card part. The FMC submodule provides the functionality required by the specification of the LLRF system.
 
 
TUP039 Low Latency Data Transmission in LLRF Systems 877
 
  • D.R. Makowski, G.W. Jabłoński, A. Napieralski, P. Predki
    TUL-DMCS, Łódź, Poland
 
  Funding: The research leading to these results has received funding from the Polish National Science Council Grant 642/N-TESLAXFEL/09/2010/0.
The linear accelerators applied to drive Free Electron Lasers (FELs), such as the X-Ray Free Electron Laser (XFEL), require sophisticated control systems. The Low Level Radio Frequency (LLRF) control systems of a linear accelerator should provide signal to vector modulator in less than 1 microsecond. Therefore the latency of communication interfaces is more important than their throughput. The paper discusses the application of serial gigabit links for transmission of data in LLRF systems. The latency of pure serial transmission based on Xilinx RocketIO transceivers was evaluated and compared with Xilinx Aurora protocol. The developed low latency protocol will be also presented.
 
 
TUP040 Asset Management Application for a LLRF Control System 880
 
  • B. Sakowicz, M. Kamiński, D.R. Makowski, P. Mazur, A. Napieralski, A. Piotrowski
    TUL-DMCS, Łódź, Poland
 
  Funding: The research leading to these results has received funding from the Polish National Science Council Grant 642/N-TESLAXFEL/09/2010/0.
In this article an asset management application for a low level radio frequency (LLRF) control system is described. The system was developed to facilitate management of some aspects of controlling a linear accelerator and, among others, provides means to manage and program multiple firmware versions for a large, distributed and frequently changing set of FPGA devices that are present in a control system. The system introduces a multihierarchical tree-based representation of almost all assets involved in accelerator management.*
* Kamiński M., Makowski D., Mazur P., Murlewski J., Sakowicz B.: "Firmware application for LLRF control system based on the Enterprise Service Bus", CADSM 2009, Ukraine, ISBN 978-966-2191-05-9