Author: Chi, Y.L.
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MOPJE006 Electron Gun Longitudinal Jitter: Simulation and Analysis 297
 
  • M.S. Liu, Y.L. Chi, S. Pei, Y.F. Sui
    IHEP, People's Republic of China
 
  The beam longitudinal jitter is fatal not only for the electron beam performance but also for the positron yield in routine operation of the Beijing Electron Positron Collider II (BEPCII) linear accelerator (Linac). Practically, longitudinal jitter has been observed many times which decreased the beam performance. We simulated the electron gun longitudinal jitter effect by PARMELA software in bunch capture process and analyzed its results about beam performance including average energy, energy spread, emittance and longitudinal phase of reference particle. We adjusted the electron gun trigger time during one cycle without changing other parameters. The percentage difference between maximum and minimum of average energy, energy spread, emittance and longitudinal phase of reference particle was 11.3%, 42%, 98% and 6.4%, respectively. It is observed and analyzed that gun trigger time longitudinal jitter is fatal for maintaining good beam performance. This analysis also gives a salutary lesson to any other longitudinal jitter which can affect the beam bunching in pre-injector .  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2015-MOPJE006  
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MOPTY012 Design and Test of Prototype of LLRF System for KIPT Neutron Source LINAC 959
 
  • X.P. Ma, Y.L. Chi, R.L. Liu
    IHEP, Beijing, People's Republic of China
  • S. Shu
    Institute of High Energy Physics (IHEP), Chinese Academy of Sciences, Beijing, People's Republic of China
 
  A 100 MeV/100 kW electron LINAC is being constructed by IHEP, China for the NSC KIPT Neutron Source project in Ukraine. A LLRF system is required to produce the driver RF input of the klystron and maintain the accelerating phase and amplitude stability of the machine. The LLRF system consists of an RF reference distribution system, six identical control units, and the fast RF interlock module. The main part of control unit is the PXI-bus crate implemented with PXI9846 - 4 ADC digitizer board and ICS572 - high speed 2 ADC/2 DAC signal process board. An EPICS IOC based on WinDriver as the PCI device driver is developed and tested. Preliminary results show phase detect resolution of 0.03 degree (rms) of 2856 MHz signal has been achieved.
*Mail Address: maxp@ihep.ac.cn
 
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2015-MOPTY012  
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