Author: Dedic, J.     [Dedič, J.]
Paper Title Page
MOPWA088 FPGA Development Approach for Accelerator Systems with High Integration Complexity 876
  • J. Dedič, K. Žagar
    COBIK, Solkan, Slovenia
  • A.M.M. Aulin Söderqvist, N.H. Claesson, R. Tavčar
    Cosylab, Ljubljana, Slovenia
  • J. Neves Rodrigues
    Lund University, Lund, Sweden
  During the application-layer FPGA development for timing system for a medical accelerator (accelerator: MedAustron, timing system: Micro Research Finland) and a couple of other FPGA projects (power supply waveform generator, Machine Protection System proof of concept, ESS timing system demo) we got very good insight on how to approach demanding FPGA development that requires team work of many developers, coupled with particularities of accelerator system development. Because subsystems’ specific requirements evolve together with the operational understanding of the entire machine, the careful balance has to be taken between requirements gathering, prototyping and development stage. Furthermore, when doing architectural design decisions, knowledge from multiple domains should be taken into account; accelerator operation, software development and FPGA development. The design shouldn’t be register or counter centric, and FPGA functionality shouldn’t appear to the software developer as fixed – otherwise the design decisions of one world will sooner or later lead to spaghetti-code workarounds in the other world.