Author: Zhang, L.W.
Paper Title Page
THPPD072 Performance Optimization of the Stacked-Blumlein 3680
  • L.W. Zhang, J. Li, W.D. Wang
    CAEP/IFP, Mainyang, Sichuan, People's Republic of China
  • Y. Li
    CAEP, Mainyang, Sichuan, People's Republic of China
  Funding: This work was supported by the National Natural Science Foundation of China (11035004)
For the applications of the Dielectric Wall Accelerator (DWA), the stacked Blumlein pulse generator comprised of parallel-plate transmission lines is being developed. The peak output voltage of the stacked Blumlein will be much lower than expected due to the parasitic coupling among the individual pulse forming lines of the Blumlein stack. The finite difference time domain method is used to model the stacked Blumlein structure and determine the outputs. We present the optimization of a 20-Blumleins-stack in this paper. The results for different structures are discussed.