Author: Kang, B.-K.
Paper Title Page
THPPC080 The Development of LLRF System at PAL 3473
  • K.-H. Park, H.S. Han, Y.-G. Jung, D.E. Kim, H.-G. Lee, H.S. Suh
    PAL, Pohang, Kyungbuk, Republic of Korea
  • J.-S. Chai, H.W. Kim, Y.S. Lee
    SKKU, Suwon, Republic of Korea
  • B.-K. Kang
    POSTECH, Pohang, Kyungbuk, Republic of Korea
  The Super Conducting Radio Frequency (SCRF) systems will be installed for PLS-II. The PAL has been carrying out the design of the low level radio frequency (LLRF) system for the SCRF control using the digital technologies. The requirements of the LLRF system are to maintain the field stability in a cavity within ±0.75% in amplitude and 0.35° in phase. The LLRF system includes the analog front-end, analog and digital board (ADC, DAC, DSP, FPGA, etc.), clock generation and distribution, and so on. The control algorithm will be implemented by the VHDL. The hardware design of the LLRF for PLS-II, simulation and test results were described in the paper.