ICALEPCS2017 - List of Authors (Viti, M.)

Paper	Title	Page
TUPHA125	The Bunch Arrival Time Monitor at FLASH and European XFEL	701
	M. Viti, M.K. Czwalinna, H. Dinter, C. Gerth, K.P. Przygoda, R. Rybaniec, H. Schlarb DESY, Hamburg, Germany
	In modern free electron laser facilities like FLASH I/II and European XFEL at DESY a high resolution intra bunch train arrival time measurement is mandatory, providing a crucial information for the beam based feedback system. For this purpose a Bunch Arrival Time Monitor (BAM) was developed, based on an electro-optical scheme where an ultra-short pulsed laser is employed. A BAM is composed of several subsystems, including stepper motors, power management, dedicated readout board, management board for voltage settings, temperature sensors and temperature controller and optical amplifier. Part of the electronics is developed using the MicroTCA standard. We will present in this poster the basic requirements for the BAM, software design and implementation developed to manage the subsystems and their interactions.
	Poster TUPHA125 [1.356 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUPHA125
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

TUPHA178	Abstracted Hardware and Middleware Access in Control Applications	840
	M. Killenberg, M. Heuer, M. Hierholzer, T. Kozak, L.P. Petrosyan, Ch. Schmidt, N. Shehzad, G. Varghese, M. Viti DESY, Hamburg, Germany K. Czuba, A. Dworzanski Warsaw University of Technology, Institute of Electronic Systems, Warsaw, Poland C.P. Iatrou, J. Rahm TU Dresden, Dresden, Germany M. Kuntzsch, R. Steinbrück HZDR, Dresden, Germany S. Marsching Aquenos GmbH, Baden-Baden, Germany A. Piotrowski FastLogic Sp. z o.o., Łódź, Poland P. Prędki Rapid Development, Łódź, Poland
	Hardware access often brings implementation details into a control application, which are subsequently published to the control system. Experience at DESY has shown that it is beneficial for the software quality to use a high level of abstraction from the beginning of a project. Some hardware registers for instance can immediately be treated as process variables if an appropriate library is taking care of most of the error handling. Other parts of the hardware need an additional layer to match the abstraction level of the application. Like this development cycles can be shortened and the code is easier to read and maintain because the logic focuses on what is done, not how it is done. We present the abstraction concept we are using, which is not only unifying the access to hardware but also how process variables are published via the control system middleware.
	Poster TUPHA178 [0.875 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUPHA178
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

Paper

Title

Page

The Bunch Arrival Time Monitor at FLASH and European XFEL

701

M. Viti, M.K. Czwalinna, H. Dinter, C. Gerth, K.P. Przygoda, R. Rybaniec, H. Schlarb
DESY, Hamburg, Germany

In modern free electron laser facilities like FLASH I/II and European XFEL at DESY a high resolution intra bunch train arrival time measurement is mandatory, providing a crucial information for the beam based feedback system. For this purpose a Bunch Arrival Time Monitor (BAM) was developed, based on an electro-optical scheme where an ultra-short pulsed laser is employed. A BAM is composed of several subsystems, including stepper motors, power management, dedicated readout board, management board for voltage settings, temperature sensors and temperature controller and optical amplifier. Part of the electronics is developed using the MicroTCA standard. We will present in this poster the basic requirements for the BAM, software design and implementation developed to manage the subsystems and their interactions.

Poster TUPHA125 [1.356 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUPHA125

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

TUPHA178

Abstracted Hardware and Middleware Access in Control Applications

840

M. Killenberg, M. Heuer, M. Hierholzer, T. Kozak, L.P. Petrosyan, Ch. Schmidt, N. Shehzad, G. Varghese, M. Viti
DESY, Hamburg, Germany
K. Czuba, A. Dworzanski
Warsaw University of Technology, Institute of Electronic Systems, Warsaw, Poland
C.P. Iatrou, J. Rahm
TU Dresden, Dresden, Germany
M. Kuntzsch, R. Steinbrück
HZDR, Dresden, Germany
S. Marsching
Aquenos GmbH, Baden-Baden, Germany
A. Piotrowski
FastLogic Sp. z o.o., Łódź, Poland
P. Prędki
Rapid Development, Łódź, Poland

Hardware access often brings implementation details into a control application, which are subsequently published to the control system. Experience at DESY has shown that it is beneficial for the software quality to use a high level of abstraction from the beginning of a project. Some hardware registers for instance can immediately be treated as process variables if an appropriate library is taking care of most of the error handling. Other parts of the hardware need an additional layer to match the abstraction level of the application. Like this development cycles can be shortened and the code is easier to read and maintain because the logic focuses on what is done, not how it is done. We present the abstraction concept we are using, which is not only unifying the access to hardware but also how process variables are published via the control system middleware.

Poster TUPHA178 [0.875 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUPHA178

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)