ICALEPCS2017 - List of Authors (Prados, C.)

Paper	Title	Page
TUPHA091	A Reliable White Rabbit Network for the FAIR General Timing Machine	627
	C. Prados, J.N. Bai, A. Hahn GSI, Darmstadt, Germany A. Suresh. Suresh Hochschule Darmstadt, University of Applied Science, Darmstadt, Germany
	A new timing system based on White Rabbit (WR) is being developed for the upcoming FAIR facility at GSI in collaboration with CERN and other partners. The General Timing Machine (GTM) is responsible for the synchronization of nodes and distribution of timing events, which allows the real-time control of the accelerator equipment. WR is a time-deterministic, low latency Ethernet-based network for general data transfer and sub-ns time and frequency distribution. The FAIR WR network is considered operational only if it provides deterministic and resilient data delivery and reliable time distribution. In order to achieve this level of service, methods and techniques to increase the reliability of the GTM and WR network has been studied and evaluated. Besides, GSI has developed a network monitoring and logging system to measure the performance and detect failures of the WR network. Finally, we describe the continuous integration system at GSI and how it has improve the overall reliability of the GTM.
	Poster TUPHA091 [0.630 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUPHA091
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TUPHA092	Two Years of FAIR General Machine Timing - Experiences and Improvements	633
	M. Kreider, R. Bär, D. Beck, A. Hahn, N. Kurz, C. Prados, S. Rauch, M. Reese, M. Zweig GSI, Darmstadt, Germany M. Kreider Glyndŵr University, Wrexham, United Kingdom
	The FAIR General Machine Timing system has been in operation at GSI since 2015 and significant progress has been made in the last two years. The CRYRING accelerator was the first machine on campus operated with the new timing system and serves as a proving ground for new control system technology to this day. A White Rabbit (WR) network was set up, connecting parts of the existing facility. The Data Master was put under control of the LSA physics core. It was enhanced with a powerful schedule language and extensive research for delay bound analysis with network calculus was undertaken. Several form factors of Timing Receivers were improved, their hard and software now being in their second release and subject to a continuous series of automated long- and short-term tests in varying network scenarios. The final goal is time-synchronization of 2000-3000 nodes using the WR Precision-Time-Protocol distribution of TAI time stamps and synchronized command and control of FAIR equipment. Promising test results for scalability and accuracy were obtained when moving from temporary small lab setups to CRYRING's control system with more than 30 nodes connected over 3 layers of WR Switches.
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUPHA092
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TUPHA168	Improving Throughput and Latency of D-Bus to Meet the Requirements of the Fair Control System	809
	D.S. Day, A. Hahn, C. Prados, M. Reese GSI, Darmstadt, Germany
	In developing the control system for the FAIR accelerator complex we encountered strict latency and throughput contraints on the timely supply of data to devices controlling ramped magnets. In addition, the timing hardware that interfaces to the White Rabbit timing network may be shared by multiple processes on a single front-end computer. This paper describes the interprocess communication and resource-sharing system, and the consequences of using the D-Bus message bus. Then our experience of improving latency and throughput performance to meet the realtime requirements of the control system is discussed. Work is also presented on prioritisation techniques to allow time-critical services to share the bus with other components.
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUPHA168
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Paper

Title

Page

A Reliable White Rabbit Network for the FAIR General Timing Machine

627

C. Prados, J.N. Bai, A. Hahn
GSI, Darmstadt, Germany
A. Suresh. Suresh
Hochschule Darmstadt, University of Applied Science, Darmstadt, Germany

A new timing system based on White Rabbit (WR) is being developed for the upcoming FAIR facility at GSI in collaboration with CERN and other partners. The General Timing Machine (GTM) is responsible for the synchronization of nodes and distribution of timing events, which allows the real-time control of the accelerator equipment. WR is a time-deterministic, low latency Ethernet-based network for general data transfer and sub-ns time and frequency distribution. The FAIR WR network is considered operational only if it provides deterministic and resilient data delivery and reliable time distribution. In order to achieve this level of service, methods and techniques to increase the reliability of the GTM and WR network has been studied and evaluated. Besides, GSI has developed a network monitoring and logging system to measure the performance and detect failures of the WR network. Finally, we describe the continuous integration system at GSI and how it has improve the overall reliability of the GTM.

Poster TUPHA091 [0.630 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUPHA091

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

TUPHA092

Two Years of FAIR General Machine Timing - Experiences and Improvements

633

M. Kreider, R. Bär, D. Beck, A. Hahn, N. Kurz, C. Prados, S. Rauch, M. Reese, M. Zweig
GSI, Darmstadt, Germany
M. Kreider
Glyndŵr University, Wrexham, United Kingdom

The FAIR General Machine Timing system has been in operation at GSI since 2015 and significant progress has been made in the last two years. The CRYRING accelerator was the first machine on campus operated with the new timing system and serves as a proving ground for new control system technology to this day. A White Rabbit (WR) network was set up, connecting parts of the existing facility. The Data Master was put under control of the LSA physics core. It was enhanced with a powerful schedule language and extensive research for delay bound analysis with network calculus was undertaken. Several form factors of Timing Receivers were improved, their hard and software now being in their second release and subject to a continuous series of automated long- and short-term tests in varying network scenarios. The final goal is time-synchronization of 2000-3000 nodes using the WR Precision-Time-Protocol distribution of TAI time stamps and synchronized command and control of FAIR equipment. Promising test results for scalability and accuracy were obtained when moving from temporary small lab setups to CRYRING's control system with more than 30 nodes connected over 3 layers of WR Switches.

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUPHA092

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

TUPHA168

Improving Throughput and Latency of D-Bus to Meet the Requirements of the Fair Control System

809

D.S. Day, A. Hahn, C. Prados, M. Reese
GSI, Darmstadt, Germany

In developing the control system for the FAIR accelerator complex we encountered strict latency and throughput contraints on the timely supply of data to devices controlling ramped magnets. In addition, the timing hardware that interfaces to the White Rabbit timing network may be shared by multiple processes on a single front-end computer. This paper describes the interprocess communication and resource-sharing system, and the consequences of using the D-Bus message bus. Then our experience of improving latency and throughput performance to meet the realtime requirements of the control system is discussed. Work is also presented on prioritisation techniques to allow time-critical services to share the bus with other components.

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUPHA168

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)