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MOAPL01 |
The Control System for the Linear Accelerator at the European XFEL: Status and First Experiences |
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- T. Wilksen, A. Aghababyan, R. Bacher, P.K. Bartkiewicz, C. Behrens, T. Delfs, P. Duval, L. Fröhlich, W. Gerhardt, C. Gindler, O. Hensler, K. Hinsch, J.M. Jäger, R. Kammering, S. Karstensen, H. Kay, H. Kay, V. Kocharyan, A. Labudda, T. Limberg, S.M. Meykopff, A. Petrosyan, G. Petrosyan, L.P. Petrosyan, V. Petrosyan, P. Pototzki, K.R. Rehlich, G. Schlesselmann, E. Sombrowski, M. Staack, J. Szczesny, M. Walla, J. Wilgen, H. Wu
DESY, Hamburg, Germany
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The European XFEL (E-XFEL) is a 3.4 km long X-ray Free-Electron Laser facility and consists of a superconducting, linear accelerator with initially three undulator beam lines. The construction and installation of the E-XFEL is being completed this year and commissioning is well underway. First photon beams are expected to be available for early users in the second half of 2017. This paper will focus on the control system parts for the linear accelerator with its more than 7 million parameters and highlight briefly its design and implementation. Namely the hardware framework based on the MicroTCA.4 standard, testing software concepts and components at real and virtual accelerator facilities and a well-established method for integrating high-level controls into the middle layer through a shot-synchronized data acquisition allowed for a rapid deployment and commissioning of the accelerator. Status and experiences from a technical and an operational point-of-view will be presented.
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Slides MOAPL01 [6.198 MB]
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DOI • |
reference for this paper
※ https://doi.org/10.18429/JACoW-ICALEPCS2017-MOAPL01
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TUPHA178 |
Abstracted Hardware and Middleware Access in Control Applications |
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- M. Killenberg, M. Heuer, M. Hierholzer, T. Kozak, L.P. Petrosyan, Ch. Schmidt, N. Shehzad, G. Varghese, M. Viti
DESY, Hamburg, Germany
- K. Czuba, A. Dworzanski
Warsaw University of Technology, Institute of Electronic Systems, Warsaw, Poland
- C.P. Iatrou, J. Rahm
TU Dresden, Dresden, Germany
- M. Kuntzsch, R. Steinbrück
HZDR, Dresden, Germany
- S. Marsching
Aquenos GmbH, Baden-Baden, Germany
- A. Piotrowski
FastLogic Sp. z o.o., Łódź, Poland
- P. Prędki
Rapid Development, Łódź, Poland
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Hardware access often brings implementation details into a control application, which are subsequently published to the control system. Experience at DESY has shown that it is beneficial for the software quality to use a high level of abstraction from the beginning of a project. Some hardware registers for instance can immediately be treated as process variables if an appropriate library is taking care of most of the error handling. Other parts of the hardware need an additional layer to match the abstraction level of the application. Like this development cycles can be shortened and the code is easier to read and maintain because the logic focuses on what is done, not how it is done. We present the abstraction concept we are using, which is not only unifying the access to hardware but also how process variables are published via the control system middleware.
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Poster TUPHA178 [0.875 MB]
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DOI • |
reference for this paper
※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUPHA178
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Export • |
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