ICALEPCS2015 - List of Keywords (kicker)

Paper	Title	Other Keywords	Page
MOM308	XFEL Machine Protection System (MPS) Based on uTCA	linac, FPGA, operation, undulator	82
	S. Karstensen, M.E. Castro Carballo, J.M. Jäger, M. Staack DESY, Hamburg, Germany
	For the operation of a machine like the 3 km long linear accelerator XFEL at DESY Hamburg, a safety system keeping the beam from damaging components is obligatory. This machine protection system (MPS) must detect failures of the RF system, magnets, and other critical components in various sections of the XFEL as well as monitor beam and dark current losses, and react in an appropriate way by limiting average beam power, dumping parts of the macro-pulse, or, in the worst case, shutting down the whole accelerator. It has to consider the influence of various machine modes selected by the timing system. The MPS provides the operators with clear indications of error sources, and offers the possibility to mask any input channel to facilitate the operation of the machine. In addition, redundant installation of critical MPS components will help to avoid unnecessary downtime. This paper summarizes the requirements on the machine protection system and includes plans for its architecture and for needed hardware components. It will show up the clear way of configuring this system - not programming. Also a look into the financial aspects (manpower / maintenance / integration) will be presented.
	Slides MOM308 [1.492 MB]
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MOPGF122	A Fast Interlock Detection System for High-Power Switch Protection	FPGA, Ethernet, interface, operation	367
	P. Van Trappen, E. Carlier, S. Uyttenhove CERN, Geneva, Switzerland
	Fast pulsed kicker magnet systems are powered by high-voltage and high-current pulse generators with adjustable pulse length and amplitude. To deliver this power, fast high-voltage switches such as thyratrons and GTOs are used to control the fast discharge of pre-stored energy. To protect the machine and the generator itself against internal failures of these switches several types of fast interlocks systems are used at TE-ABT (CERN Technology department, Accelerator Beam Transfer). To get rid of this heterogeneous situation, a modular digital Fast Interlock Detection System (FIDS) has been developed in order to replace the existing fast interlocks systems. In addition to the existing functionality, the FIDS system will offer new functionalities such as extended flexibility, improved modularity, increased surveillance and diagnostics, contemporary communication protocols and automated card parametrization. A Xilinx Zynq®-7000 SoC has been selected for implementation of the required functionalities so that the FPGA (Field Programmable Gate Array) can hold the fast detection and interlocking logic while the ARM® processors allow for a flexible integration in CERN's Front-End Software Architecture (FESA) framework, advanced diagnostics and automated self-parametrization.
	Poster MOPGF122 [1.004 MB]
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WEPGF119	Bunch to Bucket Transfer System for FAIR	synchrotron, target, timing, cavity	980
	J.N. Bai IAP, Frankfurt am Main, Germany R. Bär, D. Beck, O.K. Kester, D. Ondreka, C. Prados, W.W. Terpstra GSI, Darmstadt, Germany T. Ferrand TEMF, TU Darmstadt, Darmstadt, Germany
	For the FAIR accelerator complex, synchronization of the bunch to bucket (B2B) transfer will be realized by the General Machine Timing system and the Low-Level RF system. Based on these two systems, both synchronization methods, the phase shift and the frequency beating method, are available for the B2B transfer system for FAIR. This system is capable to realize the B2B transfer within 10ms and the precision better than 1 degree for ions over the whole range of stable isotopes. At first, this system will be used for the transfer from the SIS18 to the SIS100. It will then be extended to all transfers at the FAIR accelerator facility. This paper introduces the synchronization methods and concentrates on the standard procedures and the functional blocks of the B2B transfer system.
	Poster WEPGF119 [1.493 MB]
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WEPGF127	A Generic Timing Software for Fast Pulsed Magnet Systems at CERN	hardware, timing, controls, software	1003
	C. Chanavat, M. Arruat, E. Carlier, N. Magnin CERN, Geneva, Switzerland
	At CERN, fast pulsed magnet (kicker) systems are used to inject, extract, dump and excite beams. Depending on their operational functionalities and as a result of the evolution of controls solutions over time, the timing controls of these systems were based on hybrid hardware architectures that have resulted in a large disparity of software solutions. In order to cure this situation, a Kicker Timing Software (KiTS), based on a modular hardware and software architecture, has been developed with the objective to increase the homogeneity of fast and slow timings control for all types of fast pulsed magnet systems. The KiTS uses a hardware abstraction layer and a configurable software model implemented within the Front-End Software Architecture (FESA) framework. It has been successfully deployed in the control systems of the different types of kicker systems at CERN like for the PS continuous transfer, the SPS injection and extraction, the SPS tune measurement and the LHC injection.
	Poster WEPGF127 [38.304 MB]
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Paper

Title

Other Keywords

Page

MOM308

XFEL Machine Protection System (MPS) Based on uTCA

linac, FPGA, operation, undulator

82

S. Karstensen, M.E. Castro Carballo, J.M. Jäger, M. Staack
DESY, Hamburg, Germany

For the operation of a machine like the 3 km long linear accelerator XFEL at DESY Hamburg, a safety system keeping the beam from damaging components is obligatory. This machine protection system (MPS) must detect failures of the RF system, magnets, and other critical components in various sections of the XFEL as well as monitor beam and dark current losses, and react in an appropriate way by limiting average beam power, dumping parts of the macro-pulse, or, in the worst case, shutting down the whole accelerator. It has to consider the influence of various machine modes selected by the timing system. The MPS provides the operators with clear indications of error sources, and offers the possibility to mask any input channel to facilitate the operation of the machine. In addition, redundant installation of critical MPS components will help to avoid unnecessary downtime. This paper summarizes the requirements on the machine protection system and includes plans for its architecture and for needed hardware components. It will show up the clear way of configuring this system - not programming. Also a look into the financial aspects (manpower / maintenance / integration) will be presented.

Slides MOM308 [1.492 MB]

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reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

MOPGF122

A Fast Interlock Detection System for High-Power Switch Protection

FPGA, Ethernet, interface, operation

367

P. Van Trappen, E. Carlier, S. Uyttenhove
CERN, Geneva, Switzerland

Fast pulsed kicker magnet systems are powered by high-voltage and high-current pulse generators with adjustable pulse length and amplitude. To deliver this power, fast high-voltage switches such as thyratrons and GTOs are used to control the fast discharge of pre-stored energy. To protect the machine and the generator itself against internal failures of these switches several types of fast interlocks systems are used at TE-ABT (CERN Technology department, Accelerator Beam Transfer). To get rid of this heterogeneous situation, a modular digital Fast Interlock Detection System (FIDS) has been developed in order to replace the existing fast interlocks systems. In addition to the existing functionality, the FIDS system will offer new functionalities such as extended flexibility, improved modularity, increased surveillance and diagnostics, contemporary communication protocols and automated card parametrization. A Xilinx Zynq®-7000 SoC has been selected for implementation of the required functionalities so that the FPGA (Field Programmable Gate Array) can hold the fast detection and interlocking logic while the ARM® processors allow for a flexible integration in CERN's Front-End Software Architecture (FESA) framework, advanced diagnostics and automated self-parametrization.

Poster MOPGF122 [1.004 MB]

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WEPGF119

Bunch to Bucket Transfer System for FAIR

synchrotron, target, timing, cavity

980

J.N. Bai
IAP, Frankfurt am Main, Germany
R. Bär, D. Beck, O.K. Kester, D. Ondreka, C. Prados, W.W. Terpstra
GSI, Darmstadt, Germany
T. Ferrand
TEMF, TU Darmstadt, Darmstadt, Germany

For the FAIR accelerator complex, synchronization of the bunch to bucket (B2B) transfer will be realized by the General Machine Timing system and the Low-Level RF system. Based on these two systems, both synchronization methods, the phase shift and the frequency beating method, are available for the B2B transfer system for FAIR. This system is capable to realize the B2B transfer within 10ms and the precision better than 1 degree for ions over the whole range of stable isotopes. At first, this system will be used for the transfer from the SIS18 to the SIS100. It will then be extended to all transfers at the FAIR accelerator facility. This paper introduces the synchronization methods and concentrates on the standard procedures and the functional blocks of the B2B transfer system.

Poster WEPGF119 [1.493 MB]

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reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

WEPGF127

A Generic Timing Software for Fast Pulsed Magnet Systems at CERN

hardware, timing, controls, software

1003

C. Chanavat, M. Arruat, E. Carlier, N. Magnin
CERN, Geneva, Switzerland

At CERN, fast pulsed magnet (kicker) systems are used to inject, extract, dump and excite beams. Depending on their operational functionalities and as a result of the evolution of controls solutions over time, the timing controls of these systems were based on hybrid hardware architectures that have resulted in a large disparity of software solutions. In order to cure this situation, a Kicker Timing Software (KiTS), based on a modular hardware and software architecture, has been developed with the objective to increase the homogeneity of fast and slow timings control for all types of fast pulsed magnet systems. The KiTS uses a hardware abstraction layer and a configurable software model implemented within the Front-End Software Architecture (FESA) framework. It has been successfully deployed in the control systems of the different types of kicker systems at CERN like for the PS continuous transfer, the SPS injection and extraction, the SPS tune measurement and the LHC injection.

Poster WEPGF127 [38.304 MB]

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reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)