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TUPF15 |
First Results with the Prototypes of New BPM Electronics for the Booster of the ESRF |
booster, electronics, injection, storage-ring |
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- K.B. Scheidt
ESRF, Grenoble, France
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The 25 year old BPM electronics of the ESRF’s Booster (200 MeV to 6 GeV, 300m, 75 BPM stations) are in process of replacement with new modern acquisition electronics. The design and development of this acquisition system was done in collaboration with the Instrumentation Technologies company and has resulted in a commercial product under the name Libera-Spark. It contains RF filtering & amplification electronics in front of 14 bit & 110 MHz ADCs for 4 channels, followed by a (Xilinx ZYNQ) SystemonChip for all processing, that also includes the possibility of single bunch filtering directly on the ADC data. It is housed in a compact and robust module that is fully powered over the Ethernet connection and which facilitates its installation close to the BPM stations thereby avoiding long RF cabling. For simplicity and cost economic reasons this Spark is without PLL and adjustable RF attenuators since not needed for Booster BPM applications, but possible in elaborated versions for other applications. Two prototypes were fully tested with beam and results in terms of resolution & stability were assessed since delivery in January.
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Poster TUPF15 [4.855 MB]
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WEPD05 |
Improvement of Data Transfer Speed of Large Memory Monitors |
EPICS, FPGA, injection, operation |
642 |
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- M. Tobiyama
KEK, Ibaraki, Japan
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Beam monitors with long memories will be widely used in SuperKEKB accelerators. Since the slow data transfer time of such devices usually limit the operational performance, improvement of the transfer rate is required. Two kind of devices, VME-based module and Ethernet-based modules has been developed. On the VME-based devices such as turn-by-turn position monitors for damping ring or long bunch oscillation monitors, MBLT and BLT transfer method has been implemented. For the Ethernet based system, the gated turn-by-turn monitors, SiTCP has been implemented on the FPGA and the EPICS device support for SiTCP has been developed. The improvement of the data transfer speed with the long-term reliability will be presented.
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Poster WEPD05 [1.791 MB]
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