Author: Jugo, J.
Paper Title Page
WEPAK013 SRF Cavity Simulator for LLRF Algorithms Debugging 2118
 
  • P. Echevarria, J. Knobloch, A. Neumann, A. Ushakov
    HZB, Berlin, Germany
  • E. Aldekoa, J. Jugo
    University of the Basque Country, Faculty of Science and Technology, Bilbao, Spain
 
  Funding: Work supported by German Bundesministerium für Bildung und Forschung, Land Berlin, and grants of Helmholtz Association
The availability of niobium superconducting cavities, ei-ther due to a lack of a real cavity or due to the time needed for the experiment set up (vacuum, cryogenics, cabling, etc.), is limited, and thus it can block or delay the develop-ment of new algorithms such as low level RF control. Hardware-in-the-loop simulations, where an actual cavity is replaced by an electronics system, can help to solve this issue. In this paper we present a Cavity Simulator imple-mented in a National Instruments PXI equipped with an FPGA module. This module operates with one intermedi-ate frequency input which is IQ-demodulated and fed to the electrical cavity's model, where the transmitted and re-flected voltages are calculated and IQ-modulated to gener-ate two intermediate frequency outputs. Some more ad-vanced features such as mechanical vibration modes driven by Lorentz-force detuning or external microphonics have also been implemented. This Cavity Simulator is planned to be connected to an mTCA chassis to close the loop with a LLRF control system.
 
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2018-WEPAK013  
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