IPAC2018 - List of Authors (Dennison, G.)

Paper	Title	Page
THPAK106	400 MHz Frequency/phase Detector and Counter	3481
	X.L. Fu, B. Ji, Z.G. Yin, T.J. Zhang CIAE, Beijing, People's Republic of China G. Dennison UBC & TRIUMF, Vancouver, British Columbia, Canada K. Fong, M.P. Laverty, Q. Zheng TRIUMF, Vancouver, Canada
	To enhance the performance and precision of TRIUMF Low Level RF system, a frequency/phase detector and counter based on FPGA is developed. The frequency/phase detector and counter is designed as a daughter board of the low level RF control system, and is connected to the mother board with mixed signal connectors. It sends the frequency error data to the PC though VXI databus, and provides two analog phase errors outputs. In current design, one single unit supports four channel discriminations of RF frequencies/phases. Preliminary tests show that the reported phase detector has a bandwidth of 400MHz. A unique implementation of frequency discrimination was carefully carried out to ensure the resolution can reach as high as 1Hz. The phase-frequency detector has been successfully applied to the Accelerator Cryo Module (ACM) system and the requirement of the low level RF control system is satisfied. After a long-term running test, the stability and reliability of the phase-frequency detector are verified.
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2018-THPAK106
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

Paper

Title

Page

400 MHz Frequency/phase Detector and Counter

3481

X.L. Fu, B. Ji, Z.G. Yin, T.J. Zhang
CIAE, Beijing, People's Republic of China
G. Dennison
UBC & TRIUMF, Vancouver, British Columbia, Canada
K. Fong, M.P. Laverty, Q. Zheng
TRIUMF, Vancouver, Canada

To enhance the performance and precision of TRIUMF Low Level RF system, a frequency/phase detector and counter based on FPGA is developed. The frequency/phase detector and counter is designed as a daughter board of the low level RF control system, and is connected to the mother board with mixed signal connectors. It sends the frequency error data to the PC though VXI databus, and provides two analog phase errors outputs. In current design, one single unit supports four channel discriminations of RF frequencies/phases. Preliminary tests show that the reported phase detector has a bandwidth of 400MHz. A unique implementation of frequency discrimination was carefully carried out to ensure the resolution can reach as high as 1Hz. The phase-frequency detector has been successfully applied to the Accelerator Cryo Module (ACM) system and the requirement of the low level RF control system is satisfied. After a long-term running test, the stability and reliability of the phase-frequency detector are verified.

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2018-THPAK106

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)