IPAC2018 - List of Authors (Cope, D.B.)

Paper	Title	Page
WEPMF065	High Efficiency, High Power, Resonant Cavity Amplifier For PIP-II	2518
	M.P.J. Gaudreau, N. Butler, D.B. Cope, P. H. Gordon, E.G. Johnson, M.K. Kempkes, R.E. Simpson Diversified Technologies, Inc., Bedford, Massachusetts, USA
	Funding: Funded under US DOE grant no. DE-SC0015780 Diversified Technologies, Inc. (DTI) is developing an integrated resonant-cavity combined solid-state amplifier for the Proton Improvement Plan-II (PIP-II) at Fermilab. The prototype has demonstrated multiple-transistor combining at 71% efficiency, at 675 watts per transistor at 650 MHz. The design simplifies solid-state transmitters to create straightforward scaling to high power levels. A crucial innovation is the reliable "soft-failure" mode of operation; a failure in one or more of these myriad combined transistors has negligible performance impact. The design couples the transistor drains directly to the cavity without first transforming to 50 Ohms, avoiding the otherwise-necessary multitude of circulators, cables, and connectors. DTI's design increases the power level at which it is cost-effective to employ a solid-state transmitter. DTI is upgrading the system to accommodate more transistors in each cavity module, and then will design and build a complete 100 kW-class transmitter which will consist of four such cavity modules and a combiner.
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2018-WEPMF065
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Paper

Title

Page

High Efficiency, High Power, Resonant Cavity Amplifier For PIP-II

2518

M.P.J. Gaudreau, N. Butler, D.B. Cope, P. H. Gordon, E.G. Johnson, M.K. Kempkes, R.E. Simpson
Diversified Technologies, Inc., Bedford, Massachusetts, USA

Funding: Funded under US DOE grant no. DE-SC0015780
Diversified Technologies, Inc. (DTI) is developing an integrated resonant-cavity combined solid-state amplifier for the Proton Improvement Plan-II (PIP-II) at Fermilab. The prototype has demonstrated multiple-transistor combining at 71% efficiency, at 675 watts per transistor at 650 MHz. The design simplifies solid-state transmitters to create straightforward scaling to high power levels. A crucial innovation is the reliable "soft-failure" mode of operation; a failure in one or more of these myriad combined transistors has negligible performance impact. The design couples the transistor drains directly to the cavity without first transforming to 50 Ohms, avoiding the otherwise-necessary multitude of circulators, cables, and connectors. DTI's design increases the power level at which it is cost-effective to employ a solid-state transmitter. DTI is upgrading the system to accommodate more transistors in each cavity module, and then will design and build a complete 100 kW-class transmitter which will consist of four such cavity modules and a combiner.

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2018-WEPMF065

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)