PCaPAC2012 - List of Keywords (kicker)

Paper	Title	Other Keywords	Page
WEPD48	Facility-Wide Synchronization of Standard FAIR Equipment Controllers	controls, background, radio-frequency, factory	84
	S. Rauch, R. Bär, D.H. Beck, M. Kreider, W. Panschow, C. Prados, W.W. Terpstra, M. Thieme, M. Zweig GSI, Darmstadt, Germany
	The standard equipment controller for the new FAIR accelerator facility is the Scalable Control Unit (SCU). It synchronizes and controls the actions of up to 12 purpose-built slave cards, connected in a crate. Facility-wide synchronization is a core FAIR requirement and thus precise timing of SCU slave actions is of vital importance. The SCU consists primarily of two components, a daughter board with CPU and a carrier board with FPGA, interconnected by PCI Express. The CPU receives configuration and set values with which it programs the real-time event-condition-action (ECA) unit in the FPGA. The ECA unit receives event messages via the timing network, which also synchronizes clocks using White Rabbit. Matching events trigger actions on the SCU slave cards such as ramping magnets, triggering kickers, etc. Timing requirements differ depending on the action taken. For softer real-time actions, an interrupt can be generated for complex processing on the CPU. Alternatively, the FPGA can directly fire a pulse or bus operation. The delay and jitter achievable in each case differs and this paper examines their timing performance to determine which is appropriate for the required actions.
	Poster WEPD48 [0.138 MB]

Paper

Title

Other Keywords

Page

WEPD48

Facility-Wide Synchronization of Standard FAIR Equipment Controllers

controls, background, radio-frequency, factory

84

S. Rauch, R. Bär, D.H. Beck, M. Kreider, W. Panschow, C. Prados, W.W. Terpstra, M. Thieme, M. Zweig
GSI, Darmstadt, Germany

The standard equipment controller for the new FAIR accelerator facility is the Scalable Control Unit (SCU). It synchronizes and controls the actions of up to 12 purpose-built slave cards, connected in a crate. Facility-wide synchronization is a core FAIR requirement and thus precise timing of SCU slave actions is of vital importance. The SCU consists primarily of two components, a daughter board with CPU and a carrier board with FPGA, interconnected by PCI Express. The CPU receives configuration and set values with which it programs the real-time event-condition-action (ECA) unit in the FPGA. The ECA unit receives event messages via the timing network, which also synchronizes clocks using White Rabbit. Matching events trigger actions on the SCU slave cards such as ramping magnets, triggering kickers, etc. Timing requirements differ depending on the action taken. For softer real-time actions, an interrupt can be generated for complex processing on the CPU. Alternatively, the FPGA can directly fire a pulse or bus operation. The delay and jitter achievable in each case differs and this paper examines their timing performance to determine which is appropriate for the required actions.

Poster WEPD48 [0.138 MB]