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RIS citation export for TUPOA40: Low Noise Digitizer Design for LCLS-II LLRF

AU - Huang, G.
AU - Doolittle, L.R.
AU - Xu, Y.L.
AU - Yang, J.
ED - Schaa, Volker RW
ED - Power, Maria
ED - Shiltsev, Vladimir
ED - White, Marion
TI - Low Noise Digitizer Design for LCLS-II LLRF
J2 - Proc. of NAPAC2016, Chicago, IL, USA, October 9-14, 2016
C1 - Chicago, IL, USA
T2 - North American Particle Accelerator Conference
T3 - 3
LA - english
AB - Modern accelerators use a digital low level RF controller to stabilize the fields in accelerator cavities. The noise in the receiver chain and analog to digital conversion (ADC) for the cavity probe signal is critically important. Within the closed-loop bandwidth, it will eventually become part of the field noise seen by the beam in the accelerator. Above the open-loop cavity bandwidth, feedback processes transfer that noise to the high power drive amplifiers. The LCLS-II project is expected to use an undulator to provide soft X-rays based on a stable electron beam accelerated by a superconducting linac. Project success depends on a low noise, low crosstalk analog to digital conversion. We developed a digitizer board with 8 ADC channels and 2 DAC channels. The broadband phase noise of this board is measured at <-151\thinspace dBc/Hz, and the adjacent channel crosstalk is measured at <-80\thinspace dB. In this paper we describe the digitizer board design, performance test procedures, and bench-test results.
CP - Geneva, Switzerland
SP - 364
EP - 366
KW - ion
KW - cavity
KW - hardware
DA - 2017/01
PY - 2017
SN - 978-3-95450-180-9
DO - 10.18429/JACoW-NAPAC2016-TUPOA40
UR - https://jacow.org/napac2016/papers/tupoa40.pdf
ER -