Author: Gelain, F.
Paper Title Page
THPLR048 Development of a Digital LLRF Control System at LNL 966
SPWR009   use link to see paper's listing under its alternate paper code  
 
  • S. Pavinato, M. Betti, D. Bortolato, F. Gelain, D. Marcato, D. Pedretti
    INFN/LNL, Legnaro (PD), Italy
  • M.A. Bellato, R. Isocrate
    INFN- Sez. di Padova, Padova, Italy
  • M. Bertocco
    UNIPD, Padova (PD), Italy
 
  The new Low-Level Radio Frequency (LLRF) control system for linear accelerator at Legnaro National Laboratories (LNL) of INFN is presently being commissioned. A digital Radio Frequency (RF) controller was implemented. Its goal is to stabilize the amplitude, the phase and the frequency of the superconducting cavities of the Linac. The resonance frequency of the low beta cavities is 80 MHz, while medium and high beta cavities resonate at 160 MHz. Each RF controller controls at the same time eight different cavities. The hardware complexity of the RF controller (RF IOC) is reduced by adopting direct RF sampling and the RF to baseband conversion method. The main hardware components are RF ADCs for the direct undersampling of the signals picked up from cavities, a Xilinx Kintek 7 FPGA for the signal processing and DACs for driving the power amplifiers and hence the cavities. In the RF IOC the serial communication between FPGA and ADCs and between FPGA and DACs is based on JESD204b standard. An RF front-end board (RFFE) is placed between cavities and the RF IOC. This is used to adapt the power level of the RF signal from the cavities to the ADCs and from the DACs to the power amplifiers. This paper addresses the LLRF control system focusing on the hardware design of the RF IOC and RFFE boards and on the first test results carried out with the new controller.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-LINAC2016-THPLR048  
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