Author: Varghese, P.
Paper Title Page
THPP130 Development of FPGA-based Predistortion-type Linearization Algorithms for Klystrons within Digital LLRF Control Systems for ILC-like Electron Accelerators 1162
 
  • M. Omet
    Sokendai, Ibaraki, Japan
  • B. Chase, P. Varghese
    Fermilab, Batavia, Illinois, USA
  • T. Matsumoto, S. Michizono, T. Miura, F. Qiu
    KEK, Ibaraki, Japan
 
  Two different kinds of predistortion-type linearization algorithms have been implemented and compared on an FPGA within the digital LLRF control system the Advanced Superconducting Test Facility (ASTA) at the Fermi National Accelerator Laboratory (FNAL). The algorithms are based on 2nd order polynomial functions and lookup tables with interpolation by which complex correction factors are obtained. The algorithms were tested in an actual setup including a 5 MW klystron and a superconducting 9-cell TESLA-type cavity at ASTA. By this a proof of concept was demonstrated.  
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