Paul Scherrer Institute (PSI) has led significant advancements in accelerator electronics development, leveraging Field Programmable Gate Arrays (FPGA) based Digital Signal Processing (DSP) across various critical systems, including Low Level RF (LLRF), Longitudinal Beam Loss Monitoring (LBLM), charge particle measurement via Integrating Current Transformers (ICT), Timing, Filling Pattern Monitor (FPM), Beam Position Monitor (BPM) and other essential beam instruments. Over the past decade, PSI’s approach to develop in-house control system platform (e.g. CPCI-S.0), has encouraged innovation. The strategic reorganization within PSI, fostering collaboration among FPGA firmware engineers, led to the inception of Open-Source FPGA DSP libraries hosted on GitHub. Serving as a comprehensive repository, these libraries empower developers by providing common FPGA IPs, fundamental DSP algorithms and Fixed-Point (FP) arithmetic units. Their presence advances prototype development by enabling rapid assembly of several measurement and or control concepts. In this contribution, we present the features and the transformative impact of the PSI Open-source FPGA libraries with a focus on LLRF. This initiative has not only empowered our team to provide valuable insights, but has also streamlined the integration of new recruits and students, enabling the seamless continuation of FPGA design frameworks.

Data acquisition (DAQ) is an ubiquitous feature in modern particle accelerator measurement and control systems. At the Paul Scherrer Institut (PSI), a next generation of electronic devices is being designed to meet the demands of upcoming renewal of facilities. The new developments utilize the CompactPCI Serial (CPCI-S.0) platform, and will cover a diverse set of applications, including Low Level Radio Frequency (LLRF), Longitudinal Beam Loss Monitoring (LBLM), and Filling Pattern Monitoring (FPM) systems. Careful design considerations and selection of an optimal architecture are crucial to fulfill a variety of DAQ requirements such as maximum frequency of acquisition, size of the data and different modes of triggering. In this contribution, we focus on the real-time DAQ implementations utilizing a multiprocessor system on chip (MPSoC) technology. We review the IP components developed in-house at PSI that provide the DAQ functionality. We demonstrate, that by reusing the IP components development, prototyping and testing of applications requiring the DAQ are accelerated.