The Advanced Light Source Upgrade (ALS-U) project at Lawrence Berkeley National Laboratory (LBNL) is major upgrade of the ALS that involves the design and installation of a new Accumulator Ring and an upgraded Storage Ring. The RF High Power Amplifier (HPA) with 60 kW CW output power at 500 MHz is a complex and very costly piece of equipment that will provide high power RF to the accelerating cavities in Accumulator Ring. This paper presents the main technical specifications / requirements, features, development status and construction details of various subsystems of the HPA which is being built under con-tract by R&K Company and with engineers at LBNL providing technical oversight and inputs. The HPA detailed design and construction drawings / documents were completed by the vendor and the Final Design Review was successful. Presently, manufacturing of the HPA is in progress. The HPA is self-protecting and the main features consist of a distributed control system employing extensive monitoring of various signals; slow and fast interlock responses; finite state machine controls; and built-in fault tolerance to RF or DC power supply module failures. The theoretical high reliability (MTBF ~ 135000 hours) and high availability (~99.997%) requirements of the HPA requires redundancy in RF modules and DC PS modules for delivering a minimum 48 kW RF output under module fault conditions.

We developed high-precision digital control magnet power supplies (MPSs) aiming at next-generation light sources such as SPring-8-II. The system consists of a high-precision ADC circuit and an FPGA that processes a proportional-integral control and pulse-width-modulation. Using the system, the current ripple and long-term stability (8 hours) of the MPS are controlled within 20 ppm. The MPS can be made to fit various magnets by readily adjusting feedback parameters. We also developed functions of a pattern mode and a multi-channel synchronization. In the pattern mode, the output current comes in a 0.5 Hz sine-wave that can be applied to a beam-based alignment and other purposes. The multi-channel synchronization can precisely synchronize the timing of three outputs for 6-pole steering magnets etc. The newly develop MPSs have been introduced to the next-generation 3 GeV light source, NanoTerasu, in Japan. There, large current MPSs with 50 - 650 A are used for family magnets, and DC-link type MPSs with +/-5 - 20 A are used for steering magnets in the storage ring, and various magnets in the injector linac. We will report an overview and performances of MPSs.

The Linac system at Taiwan Light Source (TLS) has been in operation for almost a quarter of a century and requires upgrades to improve its reliability. To achieve this, some components of the control system have been replaced with new digital low-level RF control units that use emerging technologies. A new unit is based on the open-source hardware platform which is named “Red Pitaya STEMlab” and offers a compact size and low power consumption. The unit features DAC blocks for downloading arbitrary waveforms with external trigger play and ADC blocks for waveform acquisition, enabling the development of real-time diagnostic toolkits. The new low-level RF control interface has been fully integrated into the existing EPICS software framework for system integration. The new digital low-level RF control system supports I/Q data with online amplitude and phase settings, and a waveform digitizer for inspecting low-level RF signals from the klystron modulator. Specific graphical applications have been designed and integrated into the existing operation interfaces. The system has been successfully achieved during routine operations. This paper describes the details of these efforts.

The Mu2e Experiment has stringent beam structure requirements; namely, it requires short (~200 ns) proton bunches separated by 1.5-2.0 $\mu$s. This beam structure will be produced using the Fermilab 8 GeV Booster, the 8 GeV Recycler Ring, and the Delivery Ring, which was formerly part of the antiproton accumulator system. Out of time beam is limited to a fraction of level of no more than $1\times 10^{-10}$, a requirement known as "extinction". Achieving this level of extinction requires a system of resonant magnets and collimators, phased such that only in time particles will pass through. The Mu2e magnet system involves two components: a 300 kHz component, timed such that the 600 kHz beam will pass through the collimators at the nodes, and a 4.5 MHz system to reduce the slewing of the in-time beam. These two systems must be precisely phase locked to the bunch rate coming from the Delivery Ring, which itself must be phased to match beam transfers coming from the Recycler. This poster describes the control system for the magnets, which is based on an Intel Arria FPGA, which handles phase locking of the magnets to the Delivery Ring, including the phase jumps required to match transfers from the Recycler.

A new digital low-level RF (LLRF) system has been developed for the High Energy Photon Source (HEPS), a 6 GeV diffraction-limited synchrotron light source under construction in Beijing. The system is composed of a digital signal processing board (DSP), two ADC/DAC daughter boards and a RF front-end board. The FPGA of the DSP board has been changed from the original ALTERA Stratix III to Xilinx zynq-7000 which comes with a versatile Processing System (PS) integrated with a highly flexible and high-performance Programmable Logic (PL) section, all on a single System on Chip (SoC). The control algorithms were implemented in PL section while the EPICS-IOC was running on the embedded Xilinx Linux within the PS. The LLRF system has been tested with a 166.6 MHz mockup cavity in the lab and the RF field inside the cavity can be controlled within +/-0.02% in amplitude error and +/-0.02 degree in phase error (peak to peak). The requirements of HEPS were therefore fulfilled. The hardware design, control algorithms and the test results of the new LLRF system are described in this paper.

As part of the High Luminosity LHC (HL-LHC) project, the SPS (LHC injector) Low Level RF has been completely re-designed. Part of this project is a system that can measure the phase of each individual bunch (5 ns spacing), to be used for both diagnostic and as input to the Beam-Based phase loop. The system uses a 5 G samples per second (Gsps) ADC mezzanine card, mounted on the motherboard with a System On Chip (SOC) FPGA for the processing, all electronics on a uTCA platform. The paper presents the motivations for this upgrade, the overall architecture (RF frequency distributed via a White Rabbit link), the main algorithms, the hardware and the firmware.

Abstract As part of the modernization of the Los Alamos Neu-tron Science Center (LANSCE), a digital low level RF (LLRF) control system for the LANSCE proton storage ring (PSR) is designed. The LLRF control system is im-plemented on a Field Programmable Gate Array (FPGA). The high resolution tunable 2.8MHz reference RF is gen-erated by a direct digital synthesizer (DDS) at the LANSCE front end and is transmitted to the PSR control system located half mile away. Since the digital LLRF control system is synthesized in the In-phase/Quadrature (I/Q) coordinate, the I/Q RF signals are generated by the Hilbert Transformer (HT) based finite impulse response (FIR) filter. For the stabilization of the cavity field, a Proportional-Integral (PI) feedback controller is imple-mented. In order to verify the performance of the LLRF control system before it is applied to the PSR, a FPGA based PSR cavity simulator is designed and its parame-ters are identified using the cavity field data obtained during the PSR beam operation. The low power LLRF testbench based on the simulator is constructed and the amplitude and phase stabilities of the digital LLRF sys-tem are verified.

The Superconducting RF system of Hefei Advanced Light Facility (HALF) can provide an accelerating electric field for the beam, and its stability is required to be of RMS ≤ 0.1% in amplitude and RMS ≤ 0.1° in phase. To achieve this, a LLRF controller is being prepared for the control of the HALF Superconducting RF system. This LLRF controller mainly consists of three modules of RF front-end, signal processing and the motor drive. The RF front-end downconverts the RF signal to the IF of 31.2375MHz (499.8/16), and then up converts the IF to the RF after being processed by the digital board. The LLRF includes four channels of down conversion (cavity sampling signal Pt, forward power signal Pf, reflected signal Pr and the reference signal Pref) and one channel of up conversion (power source drive signal). LLRF can realize three control loops and one interlock protection, namely cavity frequency tuning loop, cavity field amplitude control loop and cavity field phase control loop. The project progress of the HALF LLRF system will be introduced in this manuscript in detail.

For SRF cavity systems operated in continous wave (CW) at low effective beam loading as in Energy Recovery Linacs or Free Electron Lasers with rather low beam current, control of the tuning and counteracting any detuning caused by microphonics or Lorentz force driven coupled ponderomotive instability is mandatory to deliver and preserve a stable beam in longitudinal phase space regime. To develop beyond the currently employed mTCA based LLRF systems, a compact RF on a chip system was developed, which features several potential applications. Those range from a digital PLL to test and characterize the RF performance of cavities to a selection of detuning control algorithms, we have worked on in recent years, as e.g. a Kalman filter based state estimator controller [1] or an adaptive feedforward algorithm [2]. Here, we will show our first experimental findings with a TESLA style nine-cell SRF cavity operated in CW at our horizontal test facility HoBiCaT.

Beam position monitors (BPMs) are fundamental diagnostic tools for lightsources: thanks to their data readout, machine orbit can be stabilized and corrected by control systems. New generation machines need better performances on these diagnostic devices due to increased demands, such as smaller photon beam size and long-term stability. This article outlines all the devices that will make up the future Elettra 2.0 BPM system, based on pilot tone compensation. The entire signal acquisition chain will be described, from the pickups to data delivery to the control system. After a brief introduction about the electronics (analog signal conditioning, digital conversion and processing), more emphasis will be given to the description of timing and synchronization functionalities, machine protection system integration and machine feedback

The technological evolution of analog-to-digital and digital-to-analog converters increases the amount of data that can be processed in the digital domain. Therefore, direct digitization enables many advanced signal processing techniques and is attracting more and more attention in the field of accelerator instrumentation. The future HL-LHC Beam Position Monitor (BPM) data acquisition system to be installed near the ATLAS and CMS experiments is a clear example of an application with demanding signal processing requirements that could greatly benefit from this trend. The investigated architecture is based on an RF System-on-Chip from Xilinx, which allows fast RF conversion and high-performance digital processing to be integrated in a single chip for multiple channels. This paper compares the estimated performance and cost of such an integrated solution with an architecture based on discrete components.

Orbit feedback system (OFB) of the Taiwan Light Source (TLS) had been deployed two decade ago and upgraded to improve performance several times. The loop bandwidth was limited by existed hardware. The system cannot remove perturbation form fast source. Therefore, to improve orbit feedback performance, the system have been upgraded in 2008 [1]. It included the BPM electronics upgraded from analogy type BPM to digital BPM and the corrector power supply was also replaced by high performance switching type power supply with wide bandwidth in the same time. Later after Taiwan Photon Source (TPS) commissioning in 2015, to share resources between TLS and TPS control system, it has been decided that TLS’s control system would be migrated gradually to the EPICS (Experimental Physics and Industrial Control System) control system which has been adopted by TPS [2][3]. Orbit feedback system is one of the rejuvenated subsystem with EPICS support. Besides, the feedback computation unit is also upgraded to FPGA and increase calculating cycle from 2.5 kHz to 10 kHz. The integration of BPM, power supply control and fast orbit feedback will be summarized in this report.

Digital beam signal processor is critical for the beam diagnostic resolution and on-line application performance. High speed & high precision ADC, high performance FPGA are the key devices for the evolution of the processor. At present, ADC technology has entered the era of RF direct sampling, which bandwidth is up to 9GHz, sampling rate is higher than 2GSPS, and sampling bits is up to 14 bits. If the beam signal is sampled directly and processed with an FPGA, the beam diagnostic system structure will be much more concise and stable. In this paper, a developed direct RF sampling processor for beam diagnostic in SXFEL and SSRF will be introduced, and the first application on cavity BPM system will be shown.