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TY - CONF AU - Salom, A. AU - Andersson, Ã . AU - Lindvall, R. AU - Malmgren, L. AU - Milan, A.M. AU - Mitrovic, A.M. AU - Pérez, F. ED - Schaa, Volker RW ED - Arduini, Gianluigi ED - Pranke, Juliana ED - Seidel, Mike ED - Lindroos, Mats TI - Digital LLRF for MAX IV J2 - Proc. of IPAC2017, Copenhagen, Denmark, 14â19 May, 2017 C1 - Copenhagen, Denmark T2 - International Particle Accelerator Conference T3 - 8 LA - english AB - The MAX IV facility consists of a 3 GeV Storage Ring(SR), a 1.5 GeV SR, and a linear accelerator (fed by two guns) that serves as a full-energy injector to the rings, but also as a driver for the Short Pulse Facility. The RF systems of the two SRs work at 100MHz. There are 6 normal conducting capacity loaded accelerating cavities and three Landau passive cavities in the 3GeV SR. In the 1.5GeV SR there are two accelerating cavities and two Landau cavities with the same characteristics. Each of these cavities is fed by a modular 60kW SSA. In the 3 GeV SR the power will be doubled by adding a second SSA when required. A digital Low Level RF system has been developed using commercial uTCA boards, with a Virtex-6 FPGA mother board (Perseus 601X) and two double stack FMC boards with fast ADCs and DACs. The large capabilities of state-of-the-art FPGAs allowed including the control of two normal conducing cavities and two landau cavities in one single LLRF system, reducing the development costs. Other utilities like the handling of fast interlocks and post-mortem analysis were also added to this system. This paper summarizes the main capabilities and performance of this DLLRF. PB - JACoW CP - Geneva, Switzerland SP - 4037 EP - 4039 KW - cavity KW - LLRF KW - FPGA KW - vacuum KW - interlocks DA - 2017/05 PY - 2017 SN - 978-3-95450-182-3 DO - 10.18429/JACoW-IPAC2017-THPAB135 UR - http://jacow.org/ipac2017/papers/thpab135.pdf ER -