Author: Lyles, J.T.M.
Paper Title Page
WEPOR044 Fpga Implementation of a Control System for the LANSCE Accelerator 2771
  • S. Kwon, L.J. Castellano, D.J. Knapp, J.T.M. Lyles, M.S. Prokop, D. Rees, A. Scheinker, P.A. Torrez
    LANL, Los Alamos, New Mexico, USA
  As part of the modernization of the Los Alamos Neutron Science Center (LANSCE), a digital low level RF (LLRF) system was designed. The LLRF control system was implemented in a Field Programmable Gate Array (FPGA) using embedded Experimental Physics and Industrial Control System (EPICS) Input Output Controller (IOC) under the Real-Time Executive for Multiprocessor Systems (RTEMS). Proportional-Integral (PI) feedback controller, static beam feedforward controller, and iterative learning controller are implemented on the FPGA. The closed loop system performance was tested with a 10mA peak current proton beam.  
DOI • reference for this paper ※ DOI:10.18429/JACoW-IPAC2016-WEPOR044  
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