Author: Joo, Y.D.
Paper Title Page
MOPMY027 Preliminary Design of High-efficiency Klystron for Pohang Accelerator Laboratory (PAL) 557
  • S.J. Park, J.Y. Choi, Y.D. Joo, K.R. Kim, W. Namkung, C.D. Park
    PAL, Pohang, Kyungbuk, Republic of Korea
  • M.-H. Cho, J.H. Hwang, T. Seong
    POSTECH, Pohang, Kyungbuk, Republic of Korea
  Funding: Supported by the Ministry of Science, ICT and Future Planning of Korea.
Klystrons for particle accelerators are typically designed to have narrow bandwidths with center frequencies ranging from several hundreds (e.g., 350) MHz to X-band (11.424 GHz). Output powers are from several tens of kW to ~1 MW for CW klystrons and ~100 MW for pulsed ones. The narrow-bandwidth requirement has enabled them to provide high gain (typically 40 - 50 dB) which greatly simplifies the RF drive system. Recently, especially for large-scale accelerator facilities, the klystron efficiency has become one of the most demanding issues. This is because electricity cost occupies a great portion of their operating budgets and the klystron efficiency is one of the important factors determining the electricity consumption of the whole accelerator system. In this regard, we have designed a high-efficiency klystron for use in the PLS-II and PAL XFEL at PAL. The basic scheme is to re-design the cavity system to include multi-cell output cavity. In this article, we report on our preliminary design work to determine major cavity parameters including cell frequencies, inter-cell distances, and coupling to external circuits (coupling beta).
DOI • reference for this paper ※ DOI:10.18429/JACoW-IPAC2016-MOPMY027  
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