JACoW is a publisher in Geneva, Switzerland that publishes the proceedings of accelerator conferences held around the world by an international collaboration of editors.
@inproceedings{gabourin:icalepcs2021-wepv041,
author = {S. Gabourin and A. Nordt and S. Pavinato},
title = {{Implementation of a VHDL Application for Interfacing Anybus CompactCom}},
booktitle = {Proc. ICALEPCS'21},
pages = {755--758},
eid = {WEPV041},
language = {english},
keywords = {interface, network, neutron, FPGA, PLC},
venue = {Shanghai, China},
series = {International Conference on Accelerator and Large Experimental Physics Control Systems},
number = {18},
publisher = {JACoW Publishing, Geneva, Switzerland},
month = {03},
year = {2022},
issn = {2226-0358},
isbn = {978-3-95450-221-9},
doi = {10.18429/JACoW-ICALEPCS2021-WEPV041},
url = {https://jacow.org/icalepcs2021/papers/wepv041.pdf},
abstract = {{The European Spallation Source (ESS ERIC), based in Lund (Sweden), will be in a few years the most powerful neutron source in Europe with an average beam power of 5 MW. It will accelerate proton beam pulses to a Tungsten wheel to generate neutrons by the spallation effect. For such beam, the Machine Protection System (MPS) at ESS must be fast and reliable, and for this reason a Fast Beam Interlock System (FBIS) based on FPGAs is required. Some protection functions monitoring slow values (like temperature, mechanical movements, magnetic fields) need however less strict reaction times and are managed by PLCs. The communications protocol established between PLCs and FBIS is PROFINET fieldbus based. The Anybus CompactCom allows an host to have connectivity to industrial networks as PROFINET. In this context, FBIS represents the host and the application code to interface the AnyBus CompactCom has been fully developed in VHDL. This paper describes an open source implementation to interface a CompactCom M40 with an FPGA.}},
}