JACoW is a publisher in Geneva, Switzerland that publishes the proceedings of accelerator conferences held around the world by an international collaboration of editors.
TY - CONF AU - Nogiec, J.M. AU - Thompson, P. ED - Furukawa, Kazuro ED - Yan, Yingbing ED - Leng, Yongbin ED - Chen, Zhichu ED - Schaa, Volker R.W. TI - Architecture of a Multi-Channel Data Streaming Device with an FPGA as a Coprocessor J2 - Proc. of ICALEPCS2021, Shanghai, China, 14-22 October 2021 CY - Shanghai, China T2 - International Conference on Accelerator and Large Experimental Physics Control Systems T3 - 18 LA - english AB - The design of a data acquisition system often involves the integration of a Field Programmable Gate Array (FPGA) with analog front-end components to achieve precise timing and control. Reuse of these hardware systems can be difficult since they need to be tightly coupled to the communications interface and timing requirements of the specific ADC used. A hybrid design exploring the use of FPGA as a coprocessor to a traditional CPU in a dataflow architecture is presented. Reduction in the volume of data and gradual transitioning of data processing away from a hard real-time environment are both discussed. Chief design concerns, including data throughput and precise synchronization with external stimuli, are addressed. The discussion is illustrated by the implementation of a multi-channel digital integrator, a device based entirely on commercial off-the-shelf (COTS) equipment. PB - JACoW Publishing CP - Geneva, Switzerland SP - 724 EP - 728 KW - FPGA KW - timing KW - controls KW - real-time KW - hardware DA - 2022/03 PY - 2022 SN - 2226-0358 SN - 978-3-95450-221-9 DO - doi:10.18429/JACoW-ICALEPCS2021-WEPV033 UR - https://jacow.org/icalepcs2021/papers/wepv033.pdf ER -