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RIS citation export for WEPV030: Testing of the RTM Carrier Boards for the ESS Accelerator

AU  - Szewiński, J.
AU  - Bartoszek, P.R.
AU  - Chmielewski, K.
AU  - Kostrzewa, K.
AU  - Kowalski, T.
AU  - Markowski, P.
AU  - Rybka, D.
AU  - Sitek, M.
AU  - Wojciechowski, Z.
ED  - Furukawa, Kazuro
ED  - Yan, Yingbing
ED  - Leng, Yongbin
ED  - Chen, Zhichu
ED  - Schaa, Volker R.W.
TI  - Testing of the RTM Carrier Boards for the ESS Accelerator
J2  - Proc. of ICALEPCS2021, Shanghai, China, 14-22 October 2021
CY  - Shanghai, China
T2  - International Conference on Accelerator and Large Experimental Physics Control Systems
T3  - 18
LA  - english
AB  - As a part of Polish in-kind contribution to the European Spallation Source (ESS), National Centre for Nuclear Research has developed low cost AMC board, which is used in the MTCA based ESS LLRF system to support RTM units in the crate. Board due to its primary function has been called ’RTM Carrier’, which may be confusing, because it is an AMC. The low cost board, that by concept shall be simple, without own functionality except providing PCIe access from MTCA backplane to the RTM device, has required significant amount of work to create complete firmware and software to cover all board functionality, which was needed to perform factory acceptance tests (FAT) of the described boards. This contribution will describe structure of the FPGA firmware and software used for the RTM Carrier acceptance testing, including techniques used for testing individual functions and features of the board.
PB  - JACoW Publishing
CP  - Geneva, Switzerland
ER  -