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BiBTeX citation export for TUAL01: CompactPCI-Serial Hardware Toolbox for SLS 2.0

  author       = {B. Kalantari and E. Johansen and W. Koprek and P. Pollet and G. Theidel},
  title        = {{CompactPCI-Serial Hardware Toolbox for SLS 2.0}},
  booktitle    = {Proc. ICALEPCS'21},
  language     = {english},
  intype       = {presented at the},
  series       = {International Conference on Accelerator and Large Experimental Physics Control Systems},
  number       = {18},
  venue        = {Shanghai, China},
  publisher    = {JACoW Publishing, Geneva, Switzerland},
  month        = {03},
  year         = {2022},
  note         = {presented at ICALEPCS'21 in Shanghai, China, unpublished},
  abstract     = {{Motivated by upcoming large upgrade projects at PSI, most prominently SLS2.0, and due to increasing demands for performance (handling more data, faster processing) in various subsystems of the accelerator and beamlines, our electronics and control system experts had the task to evaluate alternatives to the existing VME technology and build a new portfolio of electronic hardware tools accordingly. CompactPCI-Serial was chosen as the standard platform for building our future modular control and data acquisition systems. We are currently developing two CompactPCI-Serial FPGA boards: FMC+ carrier and the COM-I/O. Both cards use the same family of Xilinx MPSoC (Zynq UltraScale+) as their processing building block. Combination of these two boards, together with COTS hardware should provide our system architects with enough flexibility to build systems with required budget and performance (high-end and/or low-cost) for various applications. We report on the state of the current challenging developments and describe system architectures for building high performance control and data acquisition systems using our hardware toolbox.}},