Wei Yuan
TUP28
Design of beam position monitoring interlocking protection system
110
The machine protection system guarantees the safe operation of the HIAF (High Intensity heavy-ion Accelerator Facility) in different operating modes and also prevents damage to the online equipment in the event of a failure. Beam current data such as beam current position and phase is an important basis for analysing and diagnosing accelerator faults. In this paper, the authors designed the beam position and phase interlock monitoring system. The system is based on circular buffer and AXI4 protocol to realize the interaction of interlock data and locking of interlock status. At the same time, the system uses memory mapping to save the interlock beam data. Laboratory tests show that the system could save the beam position, beam phase, SUM signals and amplitude of sensed signal per probe path during interlocking before and after 8ms and latch the interlock status of 25 channels. The system was deployed at the CAFe-LINAC gas pedal in March 2024 to complete online measurements.
  • R. Tian, K. Gu, Y. Wei, J. Wu, Z. Li, F. Ni, J. Su, H. Xie, L. Li, Y. Zhang, G. Zhu
    Institute of Modern Physics, Chinese Academy of Sciences
Paper: TUP28
DOI: reference for this paper: 10.18429/JACoW-IBIC2024-TUP28
About:  Received: 05 Sep 2024 — Revised: 10 Sep 2024 — Accepted: 11 Sep 2024 — Issue date: 11 Dec 2024
Cite: reference for this paper using: BibTeX, LaTeX, Text/Word, RIS, EndNote
THP25
Machine protection system for HIAF
535
The High Intensity Heavy-ion Accelerator Facility (HIAF), currently under construction, is a complex machine that couples a Continuous Wave (CW) superconducting ion Linear accelerator (iLinac) with a high-energy synchrotron to produce various stable and radioactive intense beams with high energies. The machine has a versatile operation mode which requires a high flexibility and reliability to the Machine Protection System (MPS). A customized and robust MPS is designed and developed to give the readiness of the machine for operation, to mitigate and analyze faults related to the relative damage potential. To get a high speed and have a high level of reliability, all interlock signal processing is processed on radiation-tolerant Field-Programmable Gate Arrays (FPGA) with triple or dual redundancy, as well as with a fail-safe design. By implementing a multiprocessing platform system-on-chip FPGA, the HIAF MPS can be tightly integrated with other systems to maximize availability pinpoint failures for operations, and give the postmortem analysis. This paper will describe the architecture of the interlocks linking the protection systems, the strategies to manage the complexity, the detailed components, and the interlock logic of the customized HIAF MPS, as well as the test and verification of the prototype.
  • Y. Wei, F. Ni, G. Zhu, J. Su, J. Wu, K. Gu, X. Qiu, Y. Zhang, Y. Yang, Z. Li
    Institute of Modern Physics, Chinese Academy of Sciences
Paper: THP25
DOI: reference for this paper: 10.18429/JACoW-IBIC2024-THP25
About:  Received: 05 Sep 2024 — Revised: 12 Sep 2024 — Accepted: 12 Sep 2024 — Issue date: 11 Dec 2024
Cite: reference for this paper using: BibTeX, LaTeX, Text/Word, RIS, EndNote