Author: Zelazny, S.
Paper Title Page
TH1I01 LCLS-II Timing System and Synchronous Bunch Data Acquisition 453
 
  • C. Bianchini Mattison, K.H. Kim, P. Krejcik, M. Weaver, S. Zelazny
    SLAC, Menlo Park, California, USA
 
  The new timing system for the LCLS-II SC linac and FEL meets the challenging requirements for delivering multiple interleaved timing patterns to a number of different destinations at rates up to 1 MHz. The timing patterns also carry information on bunch charge and beam energy to prevent inadvertent selection of beam dumps beyond their rated beam power. Beamline instruments are equipped with a timing receiver that performs bunch-by-bunch synchronous data acquisition based on the timing pattern for that location. Data is buffered in on-board memory for up to 106 machine pulses (1 second at 1 MHz). The large data volume can be locally processed and and analysed before transmission to clients on the network. Commissioning and experience with the new system will be presented.  
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DOI • reference for this paper ※ doi:10.18429/JACoW-IBIC2023-TH1I01  
About • Received ※ 24 October 2023 — Revised ※ 25 October 2023 — Accepted ※ 16 December 2023 — Issue date ※ 17 December 2023
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