Paper |
Title |
Page |
TUPCH197 |
Low level RF System Development for the Superconducting Cavity in NSRRC
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1477 |
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- M.-S. Yeh, L.-H. Chang, F.-T. Chung, K.-T. Hsu, Y.-H. Lin, C. Wang
NSRRC, Hsinchu
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The present low level system in NSRRC is based on analogy feedback control scheme. It provides feedback regulation on EM field, phase, and resonant frequency of the superconducting RF cavity. In order to address the required flexibility and improve diagnostic of the RF control system, a new digital low-level RF system based on Field Programmable Gate Array (FPGA) is proposed to be develop in house. The status of current analogy low level RF system and the specification of new digital FPGA based low level RF system are reposted herein.
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THPCH098 |
FPGA-based Longitudinal Bunch-by-bunch Feedback System for TLS
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3023 |
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- C.H. Kuo, J. Chen, P.J. Chou, K.-T. Hsu, S.Y. Hsu, K.H. Hu, W.K. Lau, D. Lee, C.-J. Wang, M.-H. Wang, M.-S. Yeh
NSRRC, Hsinchu
- M. Dehler
PSI, Villigen
- K. Kobayashi, T. Nakamura
JASRI/SPring-8, Hyogo-ken
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A FPGA Based Longitudinal Bunch-by-Bunch Feedback System for TLS is commissioning recently to suppress strong longitudinal oscillation. The system consists of pickup, Bunch oscillation detector, FPGA based feedback processor borrow form the design of Spring8. Modulator converts the correction signal to the carrier frequency and longitudinal kicker which was re-designed form SLS' and working at 1374 MHz. The feedback processor is based upon latest generation FPGA feedback processor to process bunch signals. The memory capture is up to 250 msec bunch oscillation signal. The software and hardware design are also included for system diagnostic and support various beam physics study. Preliminary commission result will be summaried in this report.
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