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Lau, W.K.

Paper Title Page
THPCH098 FPGA-based Longitudinal Bunch-by-bunch Feedback System for TLS 3023
 
  • C.H. Kuo, J. Chen, P.J. Chou, K.-T. Hsu, S.Y. Hsu, K.H. Hu, W.K. Lau, D. Lee, C.-J. Wang, M.-H. Wang, M.-S. Yeh
    NSRRC, Hsinchu
  • M. Dehler
    PSI, Villigen
  • K. Kobayashi, T. Nakamura
    JASRI/SPring-8, Hyogo-ken
  
  A FPGA Based Longitudinal Bunch-by-Bunch Feedback System for TLS is commissioning recently to suppress strong longitudinal oscillation. The system consists of pickup, Bunch oscillation detector, FPGA based feedback processor borrow form the design of Spring8. Modulator converts the correction signal to the carrier frequency and longitudinal kicker which was re-designed form SLS' and working at 1374 MHz. The feedback processor is based upon latest generation FPGA feedback processor to process bunch signals. The memory capture is up to 250 msec bunch oscillation signal. The software and hardware design are also included for system diagnostic and support various beam physics study. Preliminary commission result will be summaried in this report.