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TUPCH191 |
Considerations for the Choice of the Intermediate Frequency and Sampling Rate for Digital RF Control
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1462 |
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- S. Simrock, M. Hoffmann, F. Ludwig
DESY, Hamburg
- M.K. Grecki, T. Jezynski
TUL-DMCS, Lodz
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Modern FPGA-based rf control systems employ digital field detectors where an intermediate frequency (IF) in the range of 10 to more than 100 MHz is sampled with a synchronized clock. Present ADC technology with 14-16 bit resolution allows for maximum sampling rates up to 250 MHz. While higher IF's increase the sensitivity to clock jitter, lower IF frequencies are more susceptible to electromagnetic noise. The choice of intermediate frequency and sampling rate should minimize the overall detector noise, provide high measurement bandwidth and low latency in field detection, and support algorithms for optimal field estimation.
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